From e90da97f3ef0dab5c97976ce227a4407918bf5a7 Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Fri, 13 Jan 2006 19:51:46 +0000 Subject: [PATCH] LHS = X86ISD::CMOVcc LHS, RHS means LHS = RHS if cc. So the operands must be flipped around. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25290 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86ISelLowering.cpp | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 776780ff531..d93ec3a5375 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -1606,7 +1606,7 @@ SDOperand X86TargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) { addTest = true; if (addTest) { - CC = DAG.getConstant(X86ISD::COND_E, MVT::i8); + CC = DAG.getConstant(X86ISD::COND_NE, MVT::i8); Cond = DAG.getNode(X86ISD::TEST, MVT::Flag, Op0, Op0); } @@ -1614,8 +1614,10 @@ SDOperand X86TargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) { Tys.push_back(Op.getValueType()); Tys.push_back(MVT::Flag); std::vector Ops; - Ops.push_back(Op.getOperand(1)); + // X86ISD::CMOV means set the result (which is operand 1) to the RHS if + // condition is true. Ops.push_back(Op.getOperand(2)); + Ops.push_back(Op.getOperand(1)); Ops.push_back(CC); Ops.push_back(Cond); return DAG.getNode(X86ISD::CMOV, Tys, Ops);