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Frame info moved out of MachineFunction into a seperate object

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5192 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2002-12-28 20:35:34 +00:00
parent 370e187aac
commit e90fcb739a
2 changed files with 14 additions and 12 deletions
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13
lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
View File

@ -11,6 +11,7 @@
#include "llvm/CodeGen/MachineInstr.h" #include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineInstrAnnot.h" #include "llvm/CodeGen/MachineInstrAnnot.h"
#include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineFunctionInfo.h"
#include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h" #include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h"
#include "llvm/Analysis/LoopInfo.h" #include "llvm/Analysis/LoopInfo.h"
#include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetMachine.h"
@ -508,7 +509,7 @@ void PhyRegAlloc::updateMachineCode() {
continue; continue;
// Reset tmp stack positions so they can be reused for each machine instr. // Reset tmp stack positions so they can be reused for each machine instr.
MF.popAllTempValues(TM); MF.getInfo()->popAllTempValues();
// Now insert speical instructions (if necessary) for call/return // Now insert speical instructions (if necessary) for call/return
// instructions. // instructions.
@ -658,7 +659,7 @@ void PhyRegAlloc::insertCode4SpilledLR(const LiveRange *LR,
RegClass *RC = LR->getRegClass(); RegClass *RC = LR->getRegClass();
const ValueSet &LVSetBef = LVI->getLiveVarSetBeforeMInst(MInst, BB); const ValueSet &LVSetBef = LVI->getLiveVarSetBeforeMInst(MInst, BB);
MF.pushTempValue(TM, MRI.getSpilledRegSize(RegType) ); MF.getInfo()->pushTempValue(MRI.getSpilledRegSize(RegType) );
vector<MachineInstr*> MIBef, MIAft; vector<MachineInstr*> MIBef, MIAft;
vector<MachineInstr*> AdIMid; vector<MachineInstr*> AdIMid;
@ -749,7 +750,7 @@ int PhyRegAlloc::getUsableUniRegAtMI(const int RegType,
// we couldn't find an unused register. Generate code to free up a reg by // we couldn't find an unused register. Generate code to free up a reg by
// saving it on stack and restoring after the instruction // saving it on stack and restoring after the instruction
int TmpOff = MF.pushTempValue(TM, MRI.getSpilledRegSize(RegType) ); int TmpOff = MF.getInfo()->pushTempValue(MRI.getSpilledRegSize(RegType));
RegU = getUniRegNotUsedByThisInst(RC, MInst); RegU = getUniRegNotUsedByThisInst(RC, MInst);
@ -1093,7 +1094,7 @@ void PhyRegAlloc::allocateStackSpace4SpilledLRs() {
if (HMI->first && HMI->second) { if (HMI->first && HMI->second) {
LiveRange *L = HMI->second; // get the LiveRange LiveRange *L = HMI->second; // get the LiveRange
if (!L->hasColor()) { // NOTE: ** allocating the size of long Type ** if (!L->hasColor()) { // NOTE: ** allocating the size of long Type **
int stackOffset = MF.allocateSpilledValue(TM, Type::LongTy); int stackOffset = MF.getInfo()->allocateSpilledValue(Type::LongTy);
L->setSpillOffFromFP(stackOffset); L->setSpillOffFromFP(stackOffset);
if (DEBUG_RA) if (DEBUG_RA)
cerr << " LR# " << L->getUserIGNode()->getIndex() cerr << " LR# " << L->getUserIGNode()->getIndex()
@ -1159,12 +1160,12 @@ void PhyRegAlloc::allocateRegisters()
for (unsigned rc=0; rc < NumOfRegClasses ; rc++) for (unsigned rc=0; rc < NumOfRegClasses ; rc++)
RegClassList[rc]->colorAllRegs(); RegClassList[rc]->colorAllRegs();
// Atter grpah coloring, if some LRs did not receive a color (i.e, spilled) // Atter graph coloring, if some LRs did not receive a color (i.e, spilled)
// a poistion for such spilled LRs // a poistion for such spilled LRs
// //
allocateStackSpace4SpilledLRs(); allocateStackSpace4SpilledLRs();
MF.popAllTempValues(TM); // TODO **Check MF.getInfo()->popAllTempValues(); // TODO **Check
// color incoming args - if the correct color was not received // color incoming args - if the correct color was not received
// insert code to copy to the correct register // insert code to copy to the correct register

13
lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp
View File

@ -11,6 +11,7 @@
#include "llvm/CodeGen/MachineInstr.h" #include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineInstrAnnot.h" #include "llvm/CodeGen/MachineInstrAnnot.h"
#include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineFunctionInfo.h"
#include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h" #include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h"
#include "llvm/Analysis/LoopInfo.h" #include "llvm/Analysis/LoopInfo.h"
#include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetMachine.h"
@ -508,7 +509,7 @@ void PhyRegAlloc::updateMachineCode() {
continue; continue;
// Reset tmp stack positions so they can be reused for each machine instr. // Reset tmp stack positions so they can be reused for each machine instr.
MF.popAllTempValues(TM); MF.getInfo()->popAllTempValues();
// Now insert speical instructions (if necessary) for call/return // Now insert speical instructions (if necessary) for call/return
// instructions. // instructions.
@ -658,7 +659,7 @@ void PhyRegAlloc::insertCode4SpilledLR(const LiveRange *LR,
RegClass *RC = LR->getRegClass(); RegClass *RC = LR->getRegClass();
const ValueSet &LVSetBef = LVI->getLiveVarSetBeforeMInst(MInst, BB); const ValueSet &LVSetBef = LVI->getLiveVarSetBeforeMInst(MInst, BB);
MF.pushTempValue(TM, MRI.getSpilledRegSize(RegType) ); MF.getInfo()->pushTempValue(MRI.getSpilledRegSize(RegType) );
vector<MachineInstr*> MIBef, MIAft; vector<MachineInstr*> MIBef, MIAft;
vector<MachineInstr*> AdIMid; vector<MachineInstr*> AdIMid;
@ -749,7 +750,7 @@ int PhyRegAlloc::getUsableUniRegAtMI(const int RegType,
// we couldn't find an unused register. Generate code to free up a reg by // we couldn't find an unused register. Generate code to free up a reg by
// saving it on stack and restoring after the instruction // saving it on stack and restoring after the instruction
int TmpOff = MF.pushTempValue(TM, MRI.getSpilledRegSize(RegType) ); int TmpOff = MF.getInfo()->pushTempValue(MRI.getSpilledRegSize(RegType));
RegU = getUniRegNotUsedByThisInst(RC, MInst); RegU = getUniRegNotUsedByThisInst(RC, MInst);
@ -1093,7 +1094,7 @@ void PhyRegAlloc::allocateStackSpace4SpilledLRs() {
if (HMI->first && HMI->second) { if (HMI->first && HMI->second) {
LiveRange *L = HMI->second; // get the LiveRange LiveRange *L = HMI->second; // get the LiveRange
if (!L->hasColor()) { // NOTE: ** allocating the size of long Type ** if (!L->hasColor()) { // NOTE: ** allocating the size of long Type **
int stackOffset = MF.allocateSpilledValue(TM, Type::LongTy); int stackOffset = MF.getInfo()->allocateSpilledValue(Type::LongTy);
L->setSpillOffFromFP(stackOffset); L->setSpillOffFromFP(stackOffset);
if (DEBUG_RA) if (DEBUG_RA)
cerr << " LR# " << L->getUserIGNode()->getIndex() cerr << " LR# " << L->getUserIGNode()->getIndex()
@ -1159,12 +1160,12 @@ void PhyRegAlloc::allocateRegisters()
for (unsigned rc=0; rc < NumOfRegClasses ; rc++) for (unsigned rc=0; rc < NumOfRegClasses ; rc++)
RegClassList[rc]->colorAllRegs(); RegClassList[rc]->colorAllRegs();
// Atter grpah coloring, if some LRs did not receive a color (i.e, spilled) // Atter graph coloring, if some LRs did not receive a color (i.e, spilled)
// a poistion for such spilled LRs // a poistion for such spilled LRs
// //
allocateStackSpace4SpilledLRs(); allocateStackSpace4SpilledLRs();
MF.popAllTempValues(TM); // TODO **Check MF.getInfo()->popAllTempValues(); // TODO **Check
// color incoming args - if the correct color was not received // color incoming args - if the correct color was not received
// insert code to copy to the correct register // insert code to copy to the correct register