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move ARMCondCodeToString to ARMAsmPrinter.cpp
remove unused variables from lowerCall git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31378 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -51,27 +51,6 @@ namespace llvm {
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};
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}
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static const char *ARMCondCodeToString(ARMCC::CondCodes CC) {
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switch (CC) {
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default: assert(0 && "Unknown condition code");
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case ARMCC::EQ: return "eq";
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case ARMCC::NE: return "ne";
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case ARMCC::CS: return "cs";
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case ARMCC::CC: return "cc";
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case ARMCC::MI: return "mi";
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case ARMCC::PL: return "pl";
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case ARMCC::VS: return "vs";
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case ARMCC::VC: return "vc";
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case ARMCC::HI: return "hi";
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case ARMCC::LS: return "ls";
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case ARMCC::GE: return "ge";
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case ARMCC::LT: return "lt";
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case ARMCC::GT: return "gt";
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case ARMCC::LE: return "le";
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case ARMCC::AL: return "al";
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}
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}
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class FunctionPass;
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class TargetMachine;
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@ -38,6 +38,27 @@ using namespace llvm;
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namespace {
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Statistic<> EmittedInsts("asm-printer", "Number of machine instrs printed");
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static const char *ARMCondCodeToString(ARMCC::CondCodes CC) {
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switch (CC) {
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default: assert(0 && "Unknown condition code");
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case ARMCC::EQ: return "eq";
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case ARMCC::NE: return "ne";
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case ARMCC::CS: return "cs";
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case ARMCC::CC: return "cc";
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case ARMCC::MI: return "mi";
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case ARMCC::PL: return "pl";
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case ARMCC::VS: return "vs";
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case ARMCC::VC: return "vc";
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case ARMCC::HI: return "hi";
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case ARMCC::LS: return "ls";
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case ARMCC::GE: return "ge";
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case ARMCC::LT: return "lt";
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case ARMCC::GT: return "gt";
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case ARMCC::LE: return "le";
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case ARMCC::AL: return "al";
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}
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}
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struct VISIBILITY_HIDDEN ARMAsmPrinter : public AsmPrinter {
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ARMAsmPrinter(std::ostream &O, TargetMachine &TM, const TargetAsmInfo *T)
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: AsmPrinter(O, TM, T) {
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@ -310,8 +310,6 @@ static SDOperand LowerCALL(SDOperand Op, SelectionDAG &DAG) {
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assert((CallConv == CallingConv::C ||
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CallConv == CallingConv::Fast)
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&& "unknown calling convention");
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bool isVarArg = cast<ConstantSDNode>(Op.getOperand(2))->getValue() != 0;
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bool isTailCall = cast<ConstantSDNode>(Op.getOperand(3))->getValue() != 0;
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SDOperand Callee = Op.getOperand(4);
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unsigned NumOps = (Op.getNumOperands() - 5) / 2;
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SDOperand StackPtr = DAG.getRegister(ARM::R13, MVT::i32);
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