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https://github.com/c64scene-ar/llvm-6502.git
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* Fix nonconstant shift case
* Turn table into 2d table git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4496 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -172,8 +172,8 @@ ISel::visitShiftInst (ShiftInst & I)
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{
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unsigned Op0r = getReg (I.getOperand (0));
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unsigned DestReg = getReg (I);
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bool isRightShift = (I.getOpcode () == Instruction::Shr);
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bool isOperandUnsigned = I.getType ()->isUnsigned ();
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bool isLeftShift = I.getOpcode() == Instruction::Shl;
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bool isOperandSigned = I.getType()->isUnsigned();
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unsigned OperandClass = getClass(I.getType());
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if (OperandClass > 2)
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@ -185,31 +185,15 @@ ISel::visitShiftInst (ShiftInst & I)
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assert(CUI->getType() == Type::UByteTy && "Shift amount not a ubyte?");
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unsigned char shAmt = CUI->getValue();
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// This is a shift right (SHR).
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static const unsigned SHRUnsignedConstantOperand[] = {
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X86::SHRir8, X86::SHRir16, X86::SHRir32
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static const unsigned ConstantOperand[][4] = {
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{ X86::SHRir8, X86::SHRir16, X86::SHRir32, 0 }, // SHR
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{ X86::SARir8, X86::SARir16, X86::SARir32, 0 }, // SAR
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{ X86::SHLir8, X86::SHLir16, X86::SHLir32, 0 }, // SHL
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{ X86::SHLir8, X86::SHLir16, X86::SHLir32, 0 }, // SAL = SHL
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};
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// This is a shift right arithmetic (SAR).
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static const unsigned SHRSignedConstantOperand[] = {
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X86::SARir8, X86::SARir16, X86::SARir32
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};
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// This is a shift left (SHL).
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static const unsigned SHLConstantOperand[] = {
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X86::SHLir8, X86::SHLir16, X86::SHLir32
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};
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const unsigned *OpTab = 0; // Figure out the operand table to use
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if (isRightShift) {
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if (isOperandUnsigned)
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OpTab = SHRUnsignedConstantOperand;
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else
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OpTab = SHRSignedConstantOperand;
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} else {
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// This is a left shift (SHL).
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OpTab = SHLConstantOperand;
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}
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const unsigned *OpTab = // Figure out the operand table to use
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ConstantOperand[isLeftShift*2+isOperandSigned];
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// Emit: <insn> reg, shamt (shift-by-immediate opcode "ir" form.)
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BuildMI(BB, OpTab[OperandClass], 2, DestReg).addReg(Op0r).addZImm(shAmt);
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@ -222,41 +206,22 @@ ISel::visitShiftInst (ShiftInst & I)
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// that amount is already in the CL register, so we have to put it
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// there first.
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//
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// Get it from the register it's in.
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unsigned Op1r = getReg (I.getOperand (1));
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// Emit: move cl, shiftAmount (put the shift amount in CL.)
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BuildMI (BB, X86::MOVrr8, 2, X86::CL).addReg (Op1r);
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BuildMI (BB, X86::MOVrr8, 2, X86::CL).addReg(getReg(I.getOperand(1)));
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// This is a shift right (SHR).
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static const unsigned SHRUnsignedOperand[] = {
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X86::SHRrr8, X86::SHRrr16, X86::SHRrr32
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static const unsigned NonConstantOperand[][4] = {
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{ X86::SHRrr8, X86::SHRrr16, X86::SHRrr32, 0 }, // SHR
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{ X86::SARrr8, X86::SARrr16, X86::SARrr32, 0 }, // SAR
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{ X86::SHLrr8, X86::SHLrr16, X86::SHLrr32, 0 }, // SHL
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{ X86::SHLrr8, X86::SHLrr16, X86::SHLrr32, 0 }, // SAL = SHL
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};
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// This is a shift right arithmetic (SAR).
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static const unsigned SHRSignedOperand[] = {
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X86::SARrr8, X86::SARrr16, X86::SARrr32
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};
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const unsigned *OpTab = // Figure out the operand table to use
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NonConstantOperand[isLeftShift*2+isOperandSigned];
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// This is a shift left (SHL).
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static const unsigned SHLOperand[] = {
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X86::SHLrr8, X86::SHLrr16, X86::SHLrr32
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};
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// Emit: <insn> reg, cl (shift-by-CL opcode; "rr" form.)
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const unsigned *OpTab = 0; // Figure out the operand table to use
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if (isRightShift) {
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if (isOperandUnsigned)
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OpTab = SHRUnsignedOperand;
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else
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OpTab = SHRSignedOperand;
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} else {
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// This is a left shift (SHL).
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OpTab = SHLOperand;
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}
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BuildMI (BB, X86::SHLrr32, 2,
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DestReg).addReg (Op0r).addReg (X86::CL);
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BuildMI(BB, OpTab[OperandClass], 2, DestReg).addReg(Op0r).addReg(X86::CL);
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}
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}
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@ -172,8 +172,8 @@ ISel::visitShiftInst (ShiftInst & I)
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{
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unsigned Op0r = getReg (I.getOperand (0));
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unsigned DestReg = getReg (I);
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bool isRightShift = (I.getOpcode () == Instruction::Shr);
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bool isOperandUnsigned = I.getType ()->isUnsigned ();
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bool isLeftShift = I.getOpcode() == Instruction::Shl;
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bool isOperandSigned = I.getType()->isUnsigned();
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unsigned OperandClass = getClass(I.getType());
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if (OperandClass > 2)
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@ -185,31 +185,15 @@ ISel::visitShiftInst (ShiftInst & I)
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assert(CUI->getType() == Type::UByteTy && "Shift amount not a ubyte?");
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unsigned char shAmt = CUI->getValue();
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// This is a shift right (SHR).
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static const unsigned SHRUnsignedConstantOperand[] = {
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X86::SHRir8, X86::SHRir16, X86::SHRir32
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static const unsigned ConstantOperand[][4] = {
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{ X86::SHRir8, X86::SHRir16, X86::SHRir32, 0 }, // SHR
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{ X86::SARir8, X86::SARir16, X86::SARir32, 0 }, // SAR
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{ X86::SHLir8, X86::SHLir16, X86::SHLir32, 0 }, // SHL
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{ X86::SHLir8, X86::SHLir16, X86::SHLir32, 0 }, // SAL = SHL
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};
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// This is a shift right arithmetic (SAR).
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static const unsigned SHRSignedConstantOperand[] = {
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X86::SARir8, X86::SARir16, X86::SARir32
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};
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// This is a shift left (SHL).
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static const unsigned SHLConstantOperand[] = {
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X86::SHLir8, X86::SHLir16, X86::SHLir32
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};
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const unsigned *OpTab = 0; // Figure out the operand table to use
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if (isRightShift) {
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if (isOperandUnsigned)
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OpTab = SHRUnsignedConstantOperand;
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else
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OpTab = SHRSignedConstantOperand;
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} else {
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// This is a left shift (SHL).
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OpTab = SHLConstantOperand;
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}
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const unsigned *OpTab = // Figure out the operand table to use
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ConstantOperand[isLeftShift*2+isOperandSigned];
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// Emit: <insn> reg, shamt (shift-by-immediate opcode "ir" form.)
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BuildMI(BB, OpTab[OperandClass], 2, DestReg).addReg(Op0r).addZImm(shAmt);
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@ -222,41 +206,22 @@ ISel::visitShiftInst (ShiftInst & I)
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// that amount is already in the CL register, so we have to put it
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// there first.
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//
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// Get it from the register it's in.
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unsigned Op1r = getReg (I.getOperand (1));
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// Emit: move cl, shiftAmount (put the shift amount in CL.)
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BuildMI (BB, X86::MOVrr8, 2, X86::CL).addReg (Op1r);
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BuildMI (BB, X86::MOVrr8, 2, X86::CL).addReg(getReg(I.getOperand(1)));
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// This is a shift right (SHR).
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static const unsigned SHRUnsignedOperand[] = {
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X86::SHRrr8, X86::SHRrr16, X86::SHRrr32
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static const unsigned NonConstantOperand[][4] = {
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{ X86::SHRrr8, X86::SHRrr16, X86::SHRrr32, 0 }, // SHR
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{ X86::SARrr8, X86::SARrr16, X86::SARrr32, 0 }, // SAR
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{ X86::SHLrr8, X86::SHLrr16, X86::SHLrr32, 0 }, // SHL
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{ X86::SHLrr8, X86::SHLrr16, X86::SHLrr32, 0 }, // SAL = SHL
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};
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// This is a shift right arithmetic (SAR).
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static const unsigned SHRSignedOperand[] = {
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X86::SARrr8, X86::SARrr16, X86::SARrr32
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};
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const unsigned *OpTab = // Figure out the operand table to use
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NonConstantOperand[isLeftShift*2+isOperandSigned];
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// This is a shift left (SHL).
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static const unsigned SHLOperand[] = {
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X86::SHLrr8, X86::SHLrr16, X86::SHLrr32
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};
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// Emit: <insn> reg, cl (shift-by-CL opcode; "rr" form.)
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const unsigned *OpTab = 0; // Figure out the operand table to use
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if (isRightShift) {
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if (isOperandUnsigned)
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OpTab = SHRUnsignedOperand;
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else
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OpTab = SHRSignedOperand;
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} else {
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// This is a left shift (SHL).
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OpTab = SHLOperand;
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}
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BuildMI (BB, X86::SHLrr32, 2,
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DestReg).addReg (Op0r).addReg (X86::CL);
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BuildMI(BB, OpTab[OperandClass], 2, DestReg).addReg(Op0r).addReg(X86::CL);
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}
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}
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