From ea28172c61db79d6b8327eb4fc7ff9f690961f75 Mon Sep 17 00:00:00 2001 From: Tom Stellard Date: Fri, 19 Sep 2014 20:42:37 +0000 Subject: [PATCH] R600/SI: Fix config value for number of gprs In r217636, the value stored in KernelInfo.Num[VS]GPRSs was changed from the highest GPR index used to the number of gprs in order to be consistent with the name of the variable. The code writing the config values still assumed that the value in this variable was the highest GPR index used, which caused the compiler to over report the number of GPRs being used. https://bugs.freedesktop.org/show_bug.cgi?id=84089 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218150 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/R600/AMDGPUAsmPrinter.cpp | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/lib/Target/R600/AMDGPUAsmPrinter.cpp b/lib/Target/R600/AMDGPUAsmPrinter.cpp index 2755af28688..b736afcb27b 100644 --- a/lib/Target/R600/AMDGPUAsmPrinter.cpp +++ b/lib/Target/R600/AMDGPUAsmPrinter.cpp @@ -389,12 +389,15 @@ void AMDGPUAsmPrinter::EmitProgramInfoSI(const MachineFunction &MF, RoundUpToAlignment(KernelInfo.ScratchSize * STM.getWavefrontSize(), 1 << ScratchAlignShift) >> ScratchAlignShift; + unsigned VGPRBlocks = (KernelInfo.NumVGPR - 1) / 4; + unsigned SGPRBlocks = (KernelInfo.NumSGPR - 1) / 8; + if (MFI->getShaderType() == ShaderType::COMPUTE) { OutStreamer.EmitIntValue(R_00B848_COMPUTE_PGM_RSRC1, 4); const uint32_t ComputePGMRSrc1 = - S_00B848_VGPRS(KernelInfo.NumVGPR / 4) | - S_00B848_SGPRS(KernelInfo.NumSGPR / 8) | + S_00B848_VGPRS(VGPRBlocks) | + S_00B848_SGPRS(SGPRBlocks) | S_00B848_PRIORITY(KernelInfo.Priority) | S_00B848_FLOAT_MODE(KernelInfo.FloatMode) | S_00B848_PRIV(KernelInfo.Priv) | @@ -418,8 +421,8 @@ void AMDGPUAsmPrinter::EmitProgramInfoSI(const MachineFunction &MF, // 0" comment but I don't see a corresponding field in the register spec. } else { OutStreamer.EmitIntValue(RsrcReg, 4); - OutStreamer.EmitIntValue(S_00B028_VGPRS(KernelInfo.NumVGPR / 4) | - S_00B028_SGPRS(KernelInfo.NumSGPR / 8), 4); + OutStreamer.EmitIntValue(S_00B028_VGPRS(VGPRBlocks) | + S_00B028_SGPRS(SGPRBlocks), 4); } if (MFI->getShaderType() == ShaderType::PIXEL) {