From ea28b322f8bec73e64e54b3c099fc1cfaa70b43c Mon Sep 17 00:00:00 2001 From: Matheus Almeida Date: Thu, 27 Mar 2014 11:52:20 +0000 Subject: [PATCH] [mips] NaCl should now use the custom MipsELFStreamer (recently added) in spite of MCELFStreamer. This is so that changes to MipsELFStreamer will automatically propagate through its subclasses. No functional changes (MipsELFStreamer has the same functionality of MCELFStreamer at the moment). Differential Revision: http://llvm-reviews.chandlerc.com/D3130 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204918 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/Mips/MCTargetDesc/MipsMCNaCl.h | 1 + .../Mips/MCTargetDesc/MipsMCTargetDesc.cpp | 2 +- .../Mips/MCTargetDesc/MipsNaClELFStreamer.cpp | 29 ++++++++++--------- 3 files changed, 18 insertions(+), 14 deletions(-) diff --git a/lib/Target/Mips/MCTargetDesc/MipsMCNaCl.h b/lib/Target/Mips/MCTargetDesc/MipsMCNaCl.h index 90264a607af..6992d06c45a 100644 --- a/lib/Target/Mips/MCTargetDesc/MipsMCNaCl.h +++ b/lib/Target/Mips/MCTargetDesc/MipsMCNaCl.h @@ -25,6 +25,7 @@ bool baseRegNeedsLoadStoreMask(unsigned Reg); MCELFStreamer *createMipsNaClELFStreamer(MCContext &Context, MCAsmBackend &TAB, raw_ostream &OS, MCCodeEmitter *Emitter, + const MCSubtargetInfo &STI, bool RelaxAll, bool NoExecStack); } diff --git a/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp b/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp index 490f03adc37..eecca681995 100644 --- a/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp +++ b/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp @@ -116,7 +116,7 @@ static MCStreamer *createMCStreamer(const Target &T, StringRef TT, S = createMipsELFStreamer(Context, MAB, OS, Emitter, STI, RelaxAll, NoExecStack); else - S = createMipsNaClELFStreamer(Context, MAB, OS, Emitter, RelaxAll, + S = createMipsNaClELFStreamer(Context, MAB, OS, Emitter, STI, RelaxAll, NoExecStack); new MipsTargetELFStreamer(*S, STI); return S; diff --git a/lib/Target/Mips/MCTargetDesc/MipsNaClELFStreamer.cpp b/lib/Target/Mips/MCTargetDesc/MipsNaClELFStreamer.cpp index 72fc5347b55..639a058cbad 100644 --- a/lib/Target/Mips/MCTargetDesc/MipsNaClELFStreamer.cpp +++ b/lib/Target/Mips/MCTargetDesc/MipsNaClELFStreamer.cpp @@ -20,6 +20,7 @@ #define DEBUG_TYPE "mips-mc-nacl" #include "Mips.h" +#include "MipsELFStreamer.h" #include "MipsMCNaCl.h" #include "llvm/MC/MCELFStreamer.h" @@ -33,11 +34,11 @@ const unsigned LoadStoreStackMaskReg = Mips::T7; /// Extend the generic MCELFStreamer class so that it can mask dangerous /// instructions. -class MipsNaClELFStreamer : public MCELFStreamer { +class MipsNaClELFStreamer : public MipsELFStreamer { public: MipsNaClELFStreamer(MCContext &Context, MCAsmBackend &TAB, raw_ostream &OS, - MCCodeEmitter *Emitter) - : MCELFStreamer(Context, TAB, OS, Emitter), PendingCall(false) {} + MCCodeEmitter *Emitter, const MCSubtargetInfo &STI) + : MipsELFStreamer(Context, TAB, OS, Emitter, STI), PendingCall(false) {} ~MipsNaClELFStreamer() {} @@ -81,7 +82,7 @@ private: MaskInst.addOperand(MCOperand::CreateReg(AddrReg)); MaskInst.addOperand(MCOperand::CreateReg(AddrReg)); MaskInst.addOperand(MCOperand::CreateReg(MaskReg)); - MCELFStreamer::EmitInstruction(MaskInst, STI); + MipsELFStreamer::EmitInstruction(MaskInst, STI); } // Sandbox indirect branch or return instruction by inserting mask operation @@ -91,7 +92,7 @@ private: EmitBundleLock(false); emitMask(AddrReg, IndirectBranchMaskReg, STI); - MCELFStreamer::EmitInstruction(MI, STI); + MipsELFStreamer::EmitInstruction(MI, STI); EmitBundleUnlock(); } @@ -106,7 +107,7 @@ private: unsigned BaseReg = MI.getOperand(AddrIdx).getReg(); emitMask(BaseReg, LoadStoreStackMaskReg, STI); } - MCELFStreamer::EmitInstruction(MI, STI); + MipsELFStreamer::EmitInstruction(MI, STI); if (MaskAfter) { // Sandbox SP change. unsigned SPReg = MI.getOperand(0).getReg(); @@ -145,7 +146,7 @@ public: if (MaskBefore || MaskAfter) sandboxLoadStoreStackChange(Inst, AddrIdx, STI, MaskBefore, MaskAfter); else - MCELFStreamer::EmitInstruction(Inst, STI); + MipsELFStreamer::EmitInstruction(Inst, STI); return; } @@ -162,20 +163,20 @@ public: unsigned TargetReg = Inst.getOperand(1).getReg(); emitMask(TargetReg, IndirectBranchMaskReg, STI); } - MCELFStreamer::EmitInstruction(Inst, STI); + MipsELFStreamer::EmitInstruction(Inst, STI); PendingCall = true; return; } if (PendingCall) { // Finish the sandboxing sequence by emitting branch delay. - MCELFStreamer::EmitInstruction(Inst, STI); + MipsELFStreamer::EmitInstruction(Inst, STI); EmitBundleUnlock(); PendingCall = false; return; } // None of the sandboxing applies, just emit the instruction. - MCELFStreamer::EmitInstruction(Inst, STI); + MipsELFStreamer::EmitInstruction(Inst, STI); } }; @@ -235,9 +236,11 @@ bool baseRegNeedsLoadStoreMask(unsigned Reg) { MCELFStreamer *createMipsNaClELFStreamer(MCContext &Context, MCAsmBackend &TAB, raw_ostream &OS, - MCCodeEmitter *Emitter, bool RelaxAll, - bool NoExecStack) { - MipsNaClELFStreamer *S = new MipsNaClELFStreamer(Context, TAB, OS, Emitter); + MCCodeEmitter *Emitter, + const MCSubtargetInfo &STI, + bool RelaxAll, bool NoExecStack) { + MipsNaClELFStreamer *S = new MipsNaClELFStreamer(Context, TAB, OS, Emitter, + STI); if (RelaxAll) S->getAssembler().setRelaxAll(true); if (NoExecStack)