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Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits from

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TargetLowering to SelectionDAG so that they have more convenient
access to the current DAG, in preparation for the ValueType routines
being changed from standalone functions to members of SelectionDAG for
the pre-legalize vector type changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37704 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman
2007-06-22 14:59:07 +00:00
parent a8c7682939
commit ea859be53c
17 changed files with 633 additions and 620 deletions
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8
lib/Target/Sparc/SparcISelDAGToDAG.cpp
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@@ -112,6 +112,7 @@ namespace {
uint64_t Mask,
uint64_t &KnownZero,
uint64_t &KnownOne,
const SelectionDAG &DAG,
unsigned Depth = 0) const;
virtual std::vector<SDOperand>
@@ -261,6 +262,7 @@ void SparcTargetLowering::computeMaskedBitsForTargetNode(const SDOperand Op,
uint64_t Mask,
uint64_t &KnownZero,
uint64_t &KnownOne,
const SelectionDAG &DAG,
unsigned Depth) const {
uint64_t KnownZero2, KnownOne2;
KnownZero = KnownOne = 0; // Don't know anything.
@@ -269,8 +271,10 @@ void SparcTargetLowering::computeMaskedBitsForTargetNode(const SDOperand Op,
default: break;
case SPISD::SELECT_ICC:
case SPISD::SELECT_FCC:
ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
DAG.ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne,
Depth+1);
DAG.ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2,
Depth+1);
assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");