From ea93f639640f8f1a80c7ffef3a465bc6017b0d35 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Sat, 25 Mar 2006 02:29:35 +0000 Subject: [PATCH] Add new intrinsic node definitions for tblgen use git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27100 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/TargetSelectionDAG.td | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/lib/Target/TargetSelectionDAG.td b/lib/Target/TargetSelectionDAG.td index 94efe42e412..3856009bd29 100644 --- a/lib/Target/TargetSelectionDAG.td +++ b/lib/Target/TargetSelectionDAG.td @@ -311,6 +311,18 @@ def build_vector : SDNode<"ISD::BUILD_VECTOR", SDTypeProfile<1, 0, []>, []>; def scalar_to_vector : SDNode<"ISD::SCALAR_TO_VECTOR", SDTypeProfile<1, 1, []>, []>; +// Nodes for intrinsics, you should use the intrinsic itself and let tblgen use +// these internally. Don't reference these directly. +def intrinsic_void : SDNode<"ISD::INTRINSIC", + SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>, + [SDNPHasChain]>; +def intrinsic_w_chain : SDNode<"ISD::INTRINSIC", + SDTypeProfile<1, -1, [SDTCisPtrTy<1>]>, + [SDNPHasChain]>; +def intrinsic_wo_chain : SDNode<"ISD::INTRINSIC", + SDTypeProfile<1, -1, [SDTCisPtrTy<1>]>, []>; + + //===----------------------------------------------------------------------===// // Selection DAG Condition Codes