From eaa91b0a1fc68984aae51f3c4b0cf29b38f89dac Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Tue, 19 Jun 2007 01:26:51 +0000 Subject: [PATCH] Replace TargetInstrInfo::CanBeDuplicated() with a M_NOT_DUPLICABLE bit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37643 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/IfConversion.cpp | 4 ++-- lib/Target/ARM/ARMInstrInfo.cpp | 29 ----------------------------- lib/Target/ARM/ARMInstrInfo.h | 2 -- lib/Target/ARM/ARMInstrInfo.td | 6 ++++++ lib/Target/ARM/ARMInstrThumb.td | 1 + lib/Target/Target.td | 1 + utils/TableGen/CodeGenInstruction.h | 1 + utils/TableGen/CodeGenTarget.cpp | 1 + utils/TableGen/InstrInfoEmitter.cpp | 1 + 9 files changed, 13 insertions(+), 33 deletions(-) diff --git a/lib/CodeGen/IfConversion.cpp b/lib/CodeGen/IfConversion.cpp index 8702bb30802..965cf6af191 100644 --- a/lib/CodeGen/IfConversion.cpp +++ b/lib/CodeGen/IfConversion.cpp @@ -547,10 +547,10 @@ void IfConverter::ScanInstructions(BBInfo &BBI) { bool SeenCondBr = false; for (MachineBasicBlock::iterator I = BBI.BB->begin(), E = BBI.BB->end(); I != E; ++I) { - if (!BBI.CannotBeCopied && !TII->CanBeDuplicated(I)) + const TargetInstrDescriptor *TID = I->getInstrDescriptor(); + if ((TID->Flags & M_NOT_DUPLICABLE) != 0) BBI.CannotBeCopied = true; - const TargetInstrDescriptor *TID = I->getInstrDescriptor(); bool isPredicated = TII->isPredicated(I); bool isCondBr = BBI.IsBrAnalyzable && (TID->Flags & M_BRANCH_FLAG) != 0 && (TID->Flags & M_BARRIER_FLAG) == 0; diff --git a/lib/Target/ARM/ARMInstrInfo.cpp b/lib/Target/ARM/ARMInstrInfo.cpp index c8f7919eabe..1370faba4d7 100644 --- a/lib/Target/ARM/ARMInstrInfo.cpp +++ b/lib/Target/ARM/ARMInstrInfo.cpp @@ -446,35 +446,6 @@ bool ARMInstrInfo::isPredicated(const MachineInstr *MI) const { return PIdx != -1 && MI->getOperand(PIdx).getImmedValue() != ARMCC::AL; } -bool ARMInstrInfo::CanBeDuplicated(const MachineInstr *MI) const { - switch (MI->getOpcode()) { - default: return true; - // These have unique labels. - case ARM::PICADD: - case ARM::PICLD: - case ARM::PICLDZH: - case ARM::PICLDZB: - case ARM::PICLDH: - case ARM::PICLDB: - case ARM::PICLDSH: - case ARM::PICLDSB: - case ARM::PICSTR: - case ARM::PICSTRH: - case ARM::PICSTRB: - case ARM::LEApcrel: - case ARM::LEApcrelJT: - case ARM::tPICADD: - case ARM::tLEApcrel: - case ARM::tLEApcrelJT: - case ARM::CONSTPOOL_ENTRY: - // These embed jumptables. - case ARM::BR_JTr: - case ARM::BR_JTm: - case ARM::BR_JTadd: - return false; - } -} - bool ARMInstrInfo::PredicateInstruction(MachineInstr *MI, const std::vector &Pred) const { unsigned Opc = MI->getOpcode(); diff --git a/lib/Target/ARM/ARMInstrInfo.h b/lib/Target/ARM/ARMInstrInfo.h index 5c098f0f1aa..5b406cb8168 100644 --- a/lib/Target/ARM/ARMInstrInfo.h +++ b/lib/Target/ARM/ARMInstrInfo.h @@ -106,8 +106,6 @@ public: // Predication support. virtual bool isPredicated(const MachineInstr *MI) const; - virtual bool CanBeDuplicated(const MachineInstr *MI) const; - virtual bool PredicateInstruction(MachineInstr *MI, const std::vector &Pred) const; diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index 76358242314..33a41a0607e 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -533,6 +533,7 @@ PseudoInst<(ops GPR:$rD, pred:$p), /// the function. The first operand is the ID# for this instruction, the second /// is the index into the MachineConstantPool that this is, the third is the /// size in bytes of this constant pool entry. +let isNotDuplicable = 1 in def CONSTPOOL_ENTRY : PseudoInst<(ops cpinst_operand:$instid, cpinst_operand:$cpidx, i32imm:$size), "${instid:label} ${cpidx:cpentry}", []>; @@ -552,6 +553,7 @@ PseudoInst<(ops i32imm:$line, i32imm:$col, i32imm:$file), ".loc $file, $line, $col", [(dwarf_loc (i32 imm:$line), (i32 imm:$col), (i32 imm:$file))]>; +let isNotDuplicable = 1 in { def PICADD : AXI1<(ops GPR:$dst, GPR:$a, pclabel:$cp, pred:$p), "$cp:\n\tadd$p $dst, pc, $a", [(set GPR:$dst, (ARMpic_add GPR:$a, imm:$cp))]>; @@ -598,6 +600,7 @@ def PICSTRB : AXI2<(ops GPR:$src, addrmodepc:$addr, pred:$p), "${addr:label}:\n\tstr${p}b $src, $addr", [(truncstorei8 GPR:$src, addrmodepc:$addr)]>; } +} //===----------------------------------------------------------------------===// // Control Flow Instructions. @@ -637,6 +640,7 @@ let isBranch = 1, isTerminator = 1, noResults = 1 in { def B : AXI<(ops brtarget:$dst), "b $dst", [(br bb:$dst)]>; + let isNotDuplicable = 1 in { def BR_JTr : JTI<(ops GPR:$dst, jtblock_operand:$jt, i32imm:$id), "mov pc, $dst \n$jt", [(ARMbrjt GPR:$dst, tjumptable:$jt, imm:$id)]>; @@ -649,6 +653,7 @@ let isBranch = 1, isTerminator = 1, noResults = 1 in { [(ARMbrjt (add GPR:$dst, GPR:$idx), tjumptable:$jt, imm:$id)]>; } + } def Bcc : AXI<(ops brtarget:$dst, ccop:$cc), "b$cc $dst", [(ARMbrcond bb:$dst, imm:$cc)]>; @@ -1152,6 +1157,7 @@ def LEApcrelJT : AXI1<(ops GPR:$dst, i32imm:$label, i32imm:$id, pred:$p), !strconcat("${:private}PCRELL${:uid}:\n\t", "add$p $dst, pc, #PCRELV${:uid}")), []>; + //===----------------------------------------------------------------------===// // TLS Instructions // diff --git a/lib/Target/ARM/ARMInstrThumb.td b/lib/Target/ARM/ARMInstrThumb.td index a1e4e24397f..996b635338e 100644 --- a/lib/Target/ARM/ARMInstrThumb.td +++ b/lib/Target/ARM/ARMInstrThumb.td @@ -170,6 +170,7 @@ PseudoInst<(ops i32imm:$amt), "@ tADJCALLSTACKDOWN $amt", [(ARMcallseq_start imm:$amt)]>, Imp<[SP],[SP]>, Requires<[IsThumb]>; +let isNotDuplicable = 1 in def tPICADD : TIt<(ops GPR:$dst, GPR:$lhs, pclabel:$cp), "$cp:\n\tadd $dst, pc", [(set GPR:$dst, (ARMpic_add GPR:$lhs, imm:$cp))]>; diff --git a/lib/Target/Target.td b/lib/Target/Target.td index 4babef15747..43e3af8667a 100644 --- a/lib/Target/Target.td +++ b/lib/Target/Target.td @@ -193,6 +193,7 @@ class Instruction { bit hasCtrlDep = 0; // Does this instruction r/w ctrl-flow chains? bit noResults = 0; // Does this instruction produce no results? bit clobbersPred = 0; // Does it clobbers condition code / predicate? + bit isNotDuplicable = 0; // Is it unsafe to duplicate this instruction? InstrItinClass Itinerary = NoItinerary;// Execution steps used for scheduling. diff --git a/utils/TableGen/CodeGenInstruction.h b/utils/TableGen/CodeGenInstruction.h index 62b2ee7c790..54d9b3fea7b 100644 --- a/utils/TableGen/CodeGenInstruction.h +++ b/utils/TableGen/CodeGenInstruction.h @@ -98,6 +98,7 @@ namespace llvm { bool hasCtrlDep; bool noResults; bool clobbersPred; + bool isNotDuplicable; /// ParseOperandName - Parse an operand name like "$foo" or "$foo.bar", /// where $foo is a whole operand and $foo.bar refers to a suboperand. diff --git a/utils/TableGen/CodeGenTarget.cpp b/utils/TableGen/CodeGenTarget.cpp index c3c1ac22717..c54ecd02e48 100644 --- a/utils/TableGen/CodeGenTarget.cpp +++ b/utils/TableGen/CodeGenTarget.cpp @@ -371,6 +371,7 @@ CodeGenInstruction::CodeGenInstruction(Record *R, const std::string &AsmStr) hasCtrlDep = R->getValueAsBit("hasCtrlDep"); noResults = R->getValueAsBit("noResults"); clobbersPred = R->getValueAsBit("clobbersPred"); + isNotDuplicable = R->getValueAsBit("isNotDuplicable"); hasVariableNumberOfOperands = false; DagInit *DI; diff --git a/utils/TableGen/InstrInfoEmitter.cpp b/utils/TableGen/InstrInfoEmitter.cpp index df25f250137..af01e4cd75a 100644 --- a/utils/TableGen/InstrInfoEmitter.cpp +++ b/utils/TableGen/InstrInfoEmitter.cpp @@ -242,6 +242,7 @@ void InstrInfoEmitter::emitRecord(const CodeGenInstruction &Inst, unsigned Num, if (Inst.isTerminator) OS << "|M_TERMINATOR_FLAG"; if (Inst.isReMaterializable) OS << "|M_REMATERIALIZIBLE"; if (Inst.clobbersPred) OS << "|M_CLOBBERS_PRED"; + if (Inst.isNotDuplicable) OS << "|M_NOT_DUPLICABLE"; if (Inst.usesCustomDAGSchedInserter) OS << "|M_USES_CUSTOM_DAG_SCHED_INSERTION"; if (Inst.hasVariableNumberOfOperands)