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Set condition code bits of BL and BLr9 to 0b1110 (ALways) to distinguish between
BL_pred and BLr9_pred. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85297 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -675,7 +675,9 @@ let isCall = 1,
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def BL : ABXI<0b1011, (outs), (ins i32imm:$func, variable_ops),
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IIC_Br, "bl\t${func:call}",
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[(ARMcall tglobaladdr:$func)]>,
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Requires<[IsARM, IsNotDarwin]>;
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Requires<[IsARM, IsNotDarwin]> {
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let Inst{31-28} = 0b1110;
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}
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def BL_pred : ABI<0b1011, (outs), (ins i32imm:$func, variable_ops),
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IIC_Br, "bl", "\t${func:call}",
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@ -711,7 +713,9 @@ let isCall = 1,
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D24, D25, D26, D27, D28, D29, D30, D31, CPSR, FPSCR] in {
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def BLr9 : ABXI<0b1011, (outs), (ins i32imm:$func, variable_ops),
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IIC_Br, "bl\t${func:call}",
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[(ARMcall tglobaladdr:$func)]>, Requires<[IsARM, IsDarwin]>;
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[(ARMcall tglobaladdr:$func)]>, Requires<[IsARM, IsDarwin]> {
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let Inst{31-28} = 0b1110;
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}
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def BLr9_pred : ABI<0b1011, (outs), (ins i32imm:$func, variable_ops),
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IIC_Br, "bl", "\t${func:call}",
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