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misched: ignore debug values during scheduling

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155457 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrew Trick 2012-04-24 18:04:34 +00:00
parent 006e1abf76
commit eb45ebbdef
1 changed files with 31 additions and 6 deletions
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37
lib/CodeGen/MachineScheduler.cpp
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@ -123,6 +123,29 @@ DefaultSchedRegistry("default", "Use the target's default scheduler choice.",
/// default scheduler if the target does not set a default. /// default scheduler if the target does not set a default.
static ScheduleDAGInstrs *createConvergingSched(MachineSchedContext *C); static ScheduleDAGInstrs *createConvergingSched(MachineSchedContext *C);
/// Decrement this iterator until reaching the top or a non-debug instr.
static MachineBasicBlock::iterator
priorNonDebug(MachineBasicBlock::iterator I, MachineBasicBlock::iterator Beg) {
assert(I != Beg && "reached the top of the region, cannot decrement");
while (--I != Beg) {
if (!I->isDebugValue())
break;
}
return I;
}
/// If this iterator is a debug value, increment until reaching the End or a
/// non-debug instruction.
static MachineBasicBlock::iterator
nextIfDebug(MachineBasicBlock::iterator I, MachineBasicBlock::iterator End) {
while(I != End) {
if (!I->isDebugValue())
break;
}
return I;
}
/// Top-level MachineScheduler pass driver. /// Top-level MachineScheduler pass driver.
/// ///
/// Visit blocks in function order. Divide each block into scheduling regions /// Visit blocks in function order. Divide each block into scheduling regions
@ -464,7 +487,7 @@ void ScheduleDAGMI::schedule() {
SchedImpl->releaseBottomNode(&(*I)); SchedImpl->releaseBottomNode(&(*I));
} }
CurrentTop = RegionBegin; CurrentTop = nextIfDebug(RegionBegin, RegionEnd);
CurrentBottom = RegionEnd; CurrentBottom = RegionEnd;
bool IsTopNode = false; bool IsTopNode = false;
while (SUnit *SU = SchedImpl->pickNode(IsTopNode)) { while (SUnit *SU = SchedImpl->pickNode(IsTopNode)) {
@ -479,7 +502,7 @@ void ScheduleDAGMI::schedule() {
if (IsTopNode) { if (IsTopNode) {
assert(SU->isTopReady() && "node still has unscheduled dependencies"); assert(SU->isTopReady() && "node still has unscheduled dependencies");
if (&*CurrentTop == MI) if (&*CurrentTop == MI)
++CurrentTop; CurrentTop = nextIfDebug(++CurrentTop, CurrentBottom);
else else
moveInstruction(MI, CurrentTop); moveInstruction(MI, CurrentTop);
// Release dependent instructions for scheduling. // Release dependent instructions for scheduling.
@ -487,11 +510,13 @@ void ScheduleDAGMI::schedule() {
} }
else { else {
assert(SU->isBottomReady() && "node still has unscheduled dependencies"); assert(SU->isBottomReady() && "node still has unscheduled dependencies");
if (&*llvm::prior(CurrentBottom) == MI) MachineBasicBlock::iterator priorII =
--CurrentBottom; priorNonDebug(CurrentBottom, CurrentTop);
if (&*priorII == MI)
CurrentBottom = priorII;
else { else {
if (&*CurrentTop == MI) if (&*CurrentTop == MI)
CurrentTop = llvm::next(CurrentTop); CurrentTop = nextIfDebug(++CurrentTop, CurrentBottom);
moveInstruction(MI, CurrentBottom); moveInstruction(MI, CurrentBottom);
CurrentBottom = MI; CurrentBottom = MI;
} }
@ -536,7 +561,7 @@ public:
IsTopNode = true; IsTopNode = true;
} }
else { else {
SU = DAG->getSUnit(llvm::prior(DAG->bottom())); SU = DAG->getSUnit(priorNonDebug(DAG->bottom(), DAG->top()));
IsTopNode = false; IsTopNode = false;
} }
if (SU->isTopReady()) { if (SU->isTopReady()) {