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Code Issues Projects Releases Wiki Activity

Final polish on machine pass registries.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29471 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Laskey 2006-08-02 12:30:23 +00:00
parent 9b9528d8f6
commit eb577ba3b8
10 changed files with 98 additions and 229 deletions
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219
include/llvm/CodeGen/MachinePassRegistry.h
View File

@ -24,6 +24,8 @@
namespace llvm {
typedef void *(*MachinePassCtor)();
//===----------------------------------------------------------------------===//
///
@ -35,8 +37,8 @@ class MachinePassRegistryListener {
public:
MachinePassRegistryListener() {}
virtual ~MachinePassRegistryListener() {}
virtual void NotifyAdd(const char *N, const char *D) = 0;
virtual void NotifyRemove(const char *N, const char *D) = 0;
virtual void NotifyAdd(const char *N, MachinePassCtor C, const char *D) = 0;
virtual void NotifyRemove(const char *N) = 0;
};
@ -45,19 +47,18 @@ public:
/// MachinePassRegistryNode - Machine pass node stored in registration list.
///
//===----------------------------------------------------------------------===//
template<typename FunctionPassCtor>
class MachinePassRegistryNode {
private:
MachinePassRegistryNode<FunctionPassCtor> *Next;// Next function pass in list.
MachinePassRegistryNode *Next; // Next function pass in list.
const char *Name; // Name of function pass.
const char *Description; // Description string.
FunctionPassCtor Ctor; // Function pass creator.
MachinePassCtor Ctor; // Function pass creator.
public:
MachinePassRegistryNode(const char *N, const char *D, FunctionPassCtor C)
MachinePassRegistryNode(const char *N, const char *D, MachinePassCtor C)
: Next(NULL)
, Name(N)
, Description(D)
@ -65,14 +66,12 @@ public:
{}
// Accessors
MachinePassRegistryNode<FunctionPassCtor> *getNext()
const { return Next; }
MachinePassRegistryNode<FunctionPassCtor> **getNextAddress()
{ return &Next; }
MachinePassRegistryNode *getNext() const { return Next; }
MachinePassRegistryNode **getNextAddress() { return &Next; }
const char *getName() const { return Name; }
const char *getDescription() const { return Description; }
FunctionPassCtor getCtor() const { return Ctor; }
void setNext(MachinePassRegistryNode<FunctionPassCtor> *N) { Next = N; }
MachinePassCtor getCtor() const { return Ctor; }
void setNext(MachinePassRegistryNode *N) { Next = N; }
};
@ -82,14 +81,12 @@ public:
/// MachinePassRegistry - Track the registration of machine passes.
///
//===----------------------------------------------------------------------===//
template<typename FunctionPassCtor>
class MachinePassRegistry {
private:
MachinePassRegistryNode<FunctionPassCtor> *List;
// List of registry nodes.
FunctionPassCtor Default; // Default function pass creator.
MachinePassRegistryNode *List; // List of registry nodes.
MachinePassCtor Default; // Default function pass creator.
MachinePassRegistryListener* Listener;// Listener for list adds are removes.
public:
@ -99,167 +96,18 @@ public:
// Accessors.
//
MachinePassRegistryNode<FunctionPassCtor> *getList() { return List; }
FunctionPassCtor getDefault() { return Default; }
void setDefault(FunctionPassCtor C) { Default = C; }
MachinePassRegistryNode *getList() { return List; }
MachinePassCtor getDefault() { return Default; }
void setDefault(MachinePassCtor C) { Default = C; }
void setListener(MachinePassRegistryListener *L) { Listener = L; }
/// Add - Adds a function pass to the registration list.
///
void Add(MachinePassRegistryNode<FunctionPassCtor> *Node) {
Node->setNext(List);
List = Node;
if (Listener) Listener->NotifyAdd(Node->getName(), Node->getDescription());
}
void Add(MachinePassRegistryNode *Node);
/// Remove - Removes a function pass from the registration list.
///
void Remove(MachinePassRegistryNode<FunctionPassCtor> *Node) {
for (MachinePassRegistryNode<FunctionPassCtor> **I = &List;
*I; I = (*I)->getNextAddress()) {
if (*I == Node) {
if (Listener) Listener->NotifyRemove(Node->getName(),
Node->getDescription());
*I = (*I)->getNext();
break;
}
}
}
/// FInd - Finds and returns a function pass in registration list, otherwise
/// returns NULL.
MachinePassRegistryNode<FunctionPassCtor> *Find(const char *Name) {
for (MachinePassRegistryNode<FunctionPassCtor> *I = List;
I; I = I->getNext()) {
if (std::string(Name) == std::string(I->getName())) return I;
}
return NULL;
}
};
//===----------------------------------------------------------------------===//
///
/// RegisterRegAlloc class - Track the registration of register allocators.
///
//===----------------------------------------------------------------------===//
class RegisterRegAlloc : public MachinePassRegistryNode<FunctionPass *(*)()> {
public:
typedef FunctionPass *(*FunctionPassCtor)();
static MachinePassRegistry<FunctionPassCtor> Registry;
RegisterRegAlloc(const char *N, const char *D, FunctionPassCtor C)
: MachinePassRegistryNode<FunctionPassCtor>(N, D, C)
{ Registry.Add(this); }
~RegisterRegAlloc() { Registry.Remove(this); }
// Accessors.
//
RegisterRegAlloc *getNext() const {
return (RegisterRegAlloc *)
MachinePassRegistryNode<FunctionPassCtor>::getNext();
}
static RegisterRegAlloc *getList() {
return (RegisterRegAlloc *)Registry.getList();
}
static FunctionPassCtor getDefault() {
return Registry.getDefault();
}
static void setDefault(FunctionPassCtor C) {
Registry.setDefault(C);
}
static void setListener(MachinePassRegistryListener *L) {
Registry.setListener(L);
}
/// FirstCtor - Finds the first register allocator in registration
/// list and returns its creator function, otherwise return NULL.
static FunctionPassCtor FirstCtor() {
MachinePassRegistryNode<FunctionPassCtor> *Node = Registry.getList();
return Node ? Node->getCtor() : NULL;
}
/// FindCtor - Finds a register allocator in registration list and returns
/// its creator function, otherwise return NULL.
static FunctionPassCtor FindCtor(const char *N) {
MachinePassRegistryNode<FunctionPassCtor> *Node = Registry.Find(N);
return Node ? Node->getCtor() : NULL;
}
};
//===----------------------------------------------------------------------===//
///
/// RegisterScheduler class - Track the registration of instruction schedulers.
///
//===----------------------------------------------------------------------===//
class SelectionDAGISel;
class ScheduleDAG;
class SelectionDAG;
class MachineBasicBlock;
class RegisterScheduler : public
MachinePassRegistryNode<
ScheduleDAG *(*)(SelectionDAGISel*, SelectionDAG*, MachineBasicBlock*)> {
public:
typedef ScheduleDAG *(*FunctionPassCtor)(SelectionDAGISel*, SelectionDAG*,
MachineBasicBlock*);
static MachinePassRegistry<FunctionPassCtor> Registry;
RegisterScheduler(const char *N, const char *D, FunctionPassCtor C)
: MachinePassRegistryNode<FunctionPassCtor>(N, D, C)
{ Registry.Add(this); }
~RegisterScheduler() { Registry.Remove(this); }
// Accessors.
//
RegisterScheduler *getNext() const {
return (RegisterScheduler *)
MachinePassRegistryNode<FunctionPassCtor>::getNext();
}
static RegisterScheduler *getList() {
return (RegisterScheduler *)Registry.getList();
}
static FunctionPassCtor getDefault() {
return Registry.getDefault();
}
static void setDefault(FunctionPassCtor C) {
Registry.setDefault(C);
}
static void setListener(MachinePassRegistryListener *L) {
Registry.setListener(L);
}
/// FirstCtor - Finds the first instruction scheduler in registration
/// list and returns its creator function, otherwise return NULL.
static FunctionPassCtor FirstCtor() {
MachinePassRegistryNode<FunctionPassCtor> *Node = Registry.getList();
return Node ? Node->getCtor() : NULL;
}
/// FindCtor - Finds a instruction scheduler in registration list and returns
/// its creator function, otherwise return NULL.
static FunctionPassCtor FindCtor(const char *N) {
MachinePassRegistryNode<FunctionPassCtor> *Node = Registry.Find(N);
return Node ? Node->getCtor() : NULL;
}
void Remove(MachinePassRegistryNode *Node);
};
@ -271,18 +119,19 @@ public:
//===----------------------------------------------------------------------===//
template<class RegistryClass>
class RegisterPassParser : public MachinePassRegistryListener,
public cl::parser<const char *> {
public cl::parser<typename RegistryClass::FunctionPassCtor> {
public:
RegisterPassParser() {}
~RegisterPassParser() { RegistryClass::setListener(NULL); }
void initialize(cl::Option &O) {
cl::parser<const char *>::initialize(O);
cl::parser<typename RegistryClass::FunctionPassCtor>::initialize(O);
// Add existing passes to option.
for (RegistryClass *Node = RegistryClass::getList();
Node; Node = Node->getNext()) {
addLiteralOption(Node->getName(), Node->getName(),
addLiteralOption(Node->getName(),
(typename RegistryClass::FunctionPassCtor)Node->getCtor(),
Node->getDescription());
}
@ -292,25 +141,13 @@ public:
// Implement the MachinePassRegistryListener callbacks.
//
virtual void NotifyAdd(const char *N, const char *D) {
addLiteralOption(N, N, D);
virtual void NotifyAdd(const char *N,
MachinePassCtor C,
const char *D) {
this->addLiteralOption(N, (typename RegistryClass::FunctionPassCtor)C, D);
}
virtual void NotifyRemove(const char *N, const char *D) {
removeLiteralOption(N);
}
// ValLessThan - Provide a sorting comparator for Values elements...
typedef std::pair<const char*, std::pair<const char*, const char*> > ValType;
static bool ValLessThan(const ValType &VT1, const ValType &VT2) {
return std::string(VT1.first) < std::string(VT2.first);
}
// printOptionInfo - Print out information about this option. Override the
// default implementation to sort the table before we print...
virtual void printOptionInfo(const cl::Option &O, unsigned GlobalWidth) const{
RegisterPassParser *PNP = const_cast<RegisterPassParser*>(this);
std::sort(PNP->Values.begin(), PNP->Values.end(), ValLessThan);
cl::parser<const char *>::printOptionInfo(O, GlobalWidth);
virtual void NotifyRemove(const char *N) {
this->removeLiteralOption(N);
}
};

30
lib/CodeGen/MachinePassRegistry.cpp
View File

@ -17,19 +17,25 @@
using namespace llvm;
//===---------------------------------------------------------------------===//
/// Add - Adds a function pass to the registration list.
///
/// RegisterRegAlloc class - Track the registration of register allocators.
///
//===---------------------------------------------------------------------===//
MachinePassRegistry<RegisterRegAlloc::FunctionPassCtor>
RegisterRegAlloc::Registry;
void MachinePassRegistry::Add(MachinePassRegistryNode *Node) {
Node->setNext(List);
List = Node;
if (Listener) Listener->NotifyAdd(Node->getName(),
Node->getCtor(),
Node->getDescription());
}
//===---------------------------------------------------------------------===//
/// Remove - Removes a function pass from the registration list.
///
/// RegisterScheduler class - Track the registration of instruction schedulers.
///
//===---------------------------------------------------------------------===//
MachinePassRegistry<RegisterScheduler::FunctionPassCtor>
RegisterScheduler::Registry;
void MachinePassRegistry::Remove(MachinePassRegistryNode *Node) {
for (MachinePassRegistryNode **I = &List; *I; I = (*I)->getNextAddress()) {
if (*I == Node) {
if (Listener) Listener->NotifyRemove(Node->getName());
*I = (*I)->getNext();
break;
}
}
}

35
lib/CodeGen/Passes.cpp
View File

@ -12,31 +12,46 @@
//
//===---------------------------------------------------------------------===//
#include "llvm/CodeGen/MachinePassRegistry.h"
#include "llvm/CodeGen/RegAllocRegistry.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/Support/CommandLine.h"
#include <iostream>
using namespace llvm;
//===---------------------------------------------------------------------===//
///
/// RegisterRegAlloc class - Track the registration of register allocators.
///
//===---------------------------------------------------------------------===//
MachinePassRegistry RegisterRegAlloc::Registry;
//===---------------------------------------------------------------------===//
///
/// RegAlloc command line options.
///
//===---------------------------------------------------------------------===//
namespace {
cl::opt<const char *, false, RegisterPassParser<RegisterRegAlloc> >
cl::opt<RegisterRegAlloc::FunctionPassCtor, false,
RegisterPassParser<RegisterRegAlloc> >
RegAlloc("regalloc",
cl::init("linearscan"),
cl::init(createLinearScanRegisterAllocator),
cl::desc("Register allocator to use: (default = linearscan)"));
}
//===---------------------------------------------------------------------===//
///
/// createRegisterAllocator - choose the appropriate register allocator.
///
//===---------------------------------------------------------------------===//
FunctionPass *llvm::createRegisterAllocator() {
RegisterRegAlloc::FunctionPassCtor Ctor = RegisterRegAlloc::getDefault();
if (!Ctor) {
Ctor = RegisterRegAlloc::FindCtor(RegAlloc);
assert(Ctor && "No register allocator found");
if (!Ctor) Ctor = RegisterRegAlloc::FirstCtor();
RegisterRegAlloc::setDefault(Ctor);
Ctor = RegAlloc;
RegisterRegAlloc::setDefault(RegAlloc);
}
assert(Ctor && "No register allocator found");
return Ctor();
}

2
lib/CodeGen/RegAllocLinearScan.cpp
View File

@ -18,8 +18,8 @@
#include "llvm/Function.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachinePassRegistry.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/CodeGen/RegAllocRegistry.h"
#include "llvm/CodeGen/SSARegMap.h"
#include "llvm/Target/MRegisterInfo.h"
#include "llvm/Target/TargetMachine.h"

2
lib/CodeGen/RegAllocLocal.cpp
View File

@ -18,8 +18,8 @@
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/SSARegMap.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachinePassRegistry.h"
#include "llvm/CodeGen/LiveVariables.h"
#include "llvm/CodeGen/RegAllocRegistry.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Support/CommandLine.h"

2
lib/CodeGen/RegAllocSimple.cpp
View File

@ -20,7 +20,7 @@
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/SSARegMap.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachinePassRegistry.h"
#include "llvm/CodeGen/RegAllocRegistry.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Support/Debug.h"

2
lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp
View File

@ -19,8 +19,8 @@
//===----------------------------------------------------------------------===//
#define DEBUG_TYPE "sched"
#include "llvm/CodeGen/MachinePassRegistry.h"
#include "llvm/CodeGen/ScheduleDAG.h"
#include "llvm/CodeGen/SchedulerRegistry.h"
#include "llvm/CodeGen/SelectionDAGISel.h"
#include "llvm/CodeGen/SSARegMap.h"
#include "llvm/Target/MRegisterInfo.h"

2
lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
View File

@ -16,8 +16,8 @@
//===----------------------------------------------------------------------===//
#define DEBUG_TYPE "sched"
#include "llvm/CodeGen/MachinePassRegistry.h"
#include "llvm/CodeGen/ScheduleDAG.h"
#include "llvm/CodeGen/SchedulerRegistry.h"
#include "llvm/CodeGen/SSARegMap.h"
#include "llvm/Target/MRegisterInfo.h"
#include "llvm/Target/TargetData.h"

2
lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp
View File

@ -14,8 +14,8 @@
//===----------------------------------------------------------------------===//
#define DEBUG_TYPE "sched"
#include "llvm/CodeGen/MachinePassRegistry.h"
#include "llvm/CodeGen/ScheduleDAG.h"
#include "llvm/CodeGen/SchedulerRegistry.h"
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/Target/TargetData.h"
#include "llvm/Target/TargetMachine.h"

27
lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
View File

@ -29,7 +29,7 @@
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineJumpTableInfo.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachinePassRegistry.h"
#include "llvm/CodeGen/SchedulerRegistry.h"
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/CodeGen/SSARegMap.h"
#include "llvm/Target/MRegisterInfo.h"
@ -40,7 +40,6 @@
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetOptions.h"
#include "llvm/Transforms/Utils/BasicBlockUtils.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/Visibility.h"
@ -61,10 +60,24 @@ ViewSchedDAGs("view-sched-dags", cl::Hidden,
static const bool ViewISelDAGs = 0, ViewSchedDAGs = 0;
#endif
//===---------------------------------------------------------------------===//
///
/// RegisterScheduler class - Track the registration of instruction schedulers.
///
//===---------------------------------------------------------------------===//
MachinePassRegistry RegisterScheduler::Registry;
//===---------------------------------------------------------------------===//
///
/// ISHeuristic command line option for instruction schedulers.
///
//===---------------------------------------------------------------------===//
namespace {
cl::opt<const char *, false, RegisterPassParser<RegisterScheduler> >
cl::opt<RegisterScheduler::FunctionPassCtor, false,
RegisterPassParser<RegisterScheduler> >
ISHeuristic("sched",
cl::init("default"),
cl::init(createDefaultScheduler),
cl::desc("Instruction schedulers available:"));
static RegisterScheduler
@ -3629,15 +3642,13 @@ void SelectionDAGISel::SelectBasicBlock(BasicBlock *LLVMBB, MachineFunction &MF,
void SelectionDAGISel::ScheduleAndEmitDAG(SelectionDAG &DAG) {
if (ViewSchedDAGs) DAG.viewGraph();
static RegisterScheduler::FunctionPassCtor Ctor =
RegisterScheduler::getDefault();
RegisterScheduler::FunctionPassCtor Ctor = RegisterScheduler::getDefault();
if (!Ctor) {
Ctor = RegisterScheduler::FindCtor(ISHeuristic);
Ctor = ISHeuristic;
RegisterScheduler::setDefault(Ctor);
}
assert(Ctor && "No instruction scheduler found");
ScheduleDAG *SL = Ctor(this, &DAG, BB);
BB = SL->Run();
delete SL;