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AArch64: use AddressingModes.h accessors for compare shifts

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No functional change because "lsl #12" is actually encoded as 12, but one less
bug if someone ever decides to change that for the giggles.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243536 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tim Northover 2015-07-29 16:39:56 +00:00
parent c3a9cb54e6
commit eb745dc50b
1 changed files with 5 additions and 4 deletions
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9
lib/Target/AArch64/AArch64ConditionOptimizer.cpp
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@ -59,6 +59,7 @@
//===----------------------------------------------------------------------===//
#include "AArch64.h"
#include "MCTargetDesc/AArch64AddressingModes.h"
#include "llvm/ADT/DepthFirstIterator.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/Statistic.h"
@ -153,12 +154,12 @@ MachineInstr *AArch64ConditionOptimizer::findSuitableCompare(
case AArch64::SUBSXri:
// cmn is an alias for adds with a dead destination register.
case AArch64::ADDSWri:
case AArch64::ADDSXri:
case AArch64::ADDSXri: {
unsigned ShiftAmt = AArch64_AM::getShiftValue(I->getOperand(3).getImm());
if (!I->getOperand(2).isImm()) {
DEBUG(dbgs() << "Immediate of cmp is symbolic, " << *I << '\n');
return nullptr;
} else if (I->getOperand(2).getImm() << I->getOperand(3).getImm() >=
0xfff) {
} else if (I->getOperand(2).getImm() << ShiftAmt >= 0xfff) {
DEBUG(dbgs() << "Immediate of cmp may be out of range, " << *I << '\n');
return nullptr;
} else if (!MRI->use_empty(I->getOperand(0).getReg())) {
@ -166,7 +167,7 @@ MachineInstr *AArch64ConditionOptimizer::findSuitableCompare(
return nullptr;
}
return I;
}
// Prevent false positive case like:
// cmp w19, #0
// cinc w0, w19, gt