Eliminate asm parser's dependency on TargetMachine:

- Each target asm parser now creates its own MCSubtatgetInfo (if needed).
- Changed AssemblerPredicate to take subtarget features which tablegen uses
  to generate asm matcher subtarget feature queries. e.g.
  "ModeThumb,FeatureThumb2" is translated to
  "(Bits & ModeThumb) != 0 && (Bits & FeatureThumb2) != 0".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134678 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng
2011-07-08 01:53:10 +00:00
parent 1fb0955cab
commit ebdeeab812
49 changed files with 318 additions and 297 deletions

View File

@@ -23,65 +23,12 @@
#define GET_INSTRINFO_MC_DESC
#include "ARMGenInstrInfo.inc"
#define GET_SUBTARGETINFO_ENUM
#define GET_SUBTARGETINFO_MC_DESC
#include "ARMGenSubtargetInfo.inc"
using namespace llvm;
MCInstrInfo *createARMMCInstrInfo() {
MCInstrInfo *X = new MCInstrInfo();
InitARMMCInstrInfo(X);
return X;
}
MCRegisterInfo *createARMMCRegisterInfo() {
MCRegisterInfo *X = new MCRegisterInfo();
InitARMMCRegisterInfo(X);
return X;
}
MCSubtargetInfo *createARMMCSubtargetInfo(StringRef TT, StringRef CPU,
StringRef FS) {
std::string ArchFS = ARM_MC::ParseARMTriple(TT);
if (!FS.empty()) {
if (!ArchFS.empty())
ArchFS = ArchFS + "," + FS.str();
else
ArchFS = FS;
}
MCSubtargetInfo *X = new MCSubtargetInfo();
InitARMMCSubtargetInfo(X, CPU, ArchFS);
return X;
}
// Force static initialization.
extern "C" void LLVMInitializeARMMCInstrInfo() {
RegisterMCInstrInfo<MCInstrInfo> X(TheARMTarget);
RegisterMCInstrInfo<MCInstrInfo> Y(TheThumbTarget);
TargetRegistry::RegisterMCInstrInfo(TheARMTarget, createARMMCInstrInfo);
TargetRegistry::RegisterMCInstrInfo(TheThumbTarget, createARMMCInstrInfo);
}
extern "C" void LLVMInitializeARMMCRegInfo() {
RegisterMCRegInfo<MCRegisterInfo> X(TheARMTarget);
RegisterMCRegInfo<MCRegisterInfo> Y(TheThumbTarget);
TargetRegistry::RegisterMCRegInfo(TheARMTarget, createARMMCRegisterInfo);
TargetRegistry::RegisterMCRegInfo(TheThumbTarget, createARMMCRegisterInfo);
}
extern "C" void LLVMInitializeARMMCSubtargetInfo() {
RegisterMCSubtargetInfo<MCSubtargetInfo> X(TheARMTarget);
RegisterMCSubtargetInfo<MCSubtargetInfo> Y(TheThumbTarget);
TargetRegistry::RegisterMCSubtargetInfo(TheARMTarget,
createARMMCSubtargetInfo);
TargetRegistry::RegisterMCSubtargetInfo(TheThumbTarget,
createARMMCSubtargetInfo);
}
std::string ARM_MC::ParseARMTriple(StringRef TT) {
// Set the boolean corresponding to the current target triple, or the default
// if one cannot be determined, to true.
@@ -135,3 +82,47 @@ std::string ARM_MC::ParseARMTriple(StringRef TT) {
return ARMArchFeature;
}
MCSubtargetInfo *ARM_MC::createARMMCSubtargetInfo(StringRef TT, StringRef CPU,
StringRef FS) {
std::string ArchFS = ARM_MC::ParseARMTriple(TT);
if (!FS.empty()) {
if (!ArchFS.empty())
ArchFS = ArchFS + "," + FS.str();
else
ArchFS = FS;
}
MCSubtargetInfo *X = new MCSubtargetInfo();
InitARMMCSubtargetInfo(X, CPU, ArchFS);
return X;
}
MCInstrInfo *createARMMCInstrInfo() {
MCInstrInfo *X = new MCInstrInfo();
InitARMMCInstrInfo(X);
return X;
}
MCRegisterInfo *createARMMCRegisterInfo() {
MCRegisterInfo *X = new MCRegisterInfo();
InitARMMCRegisterInfo(X);
return X;
}
// Force static initialization.
extern "C" void LLVMInitializeARMMCInstrInfo() {
RegisterMCInstrInfo<MCInstrInfo> X(TheARMTarget);
RegisterMCInstrInfo<MCInstrInfo> Y(TheThumbTarget);
TargetRegistry::RegisterMCInstrInfo(TheARMTarget, createARMMCInstrInfo);
TargetRegistry::RegisterMCInstrInfo(TheThumbTarget, createARMMCInstrInfo);
}
extern "C" void LLVMInitializeARMMCRegInfo() {
RegisterMCRegInfo<MCRegisterInfo> X(TheARMTarget);
RegisterMCRegInfo<MCRegisterInfo> Y(TheThumbTarget);
TargetRegistry::RegisterMCRegInfo(TheARMTarget, createARMMCRegisterInfo);
TargetRegistry::RegisterMCRegInfo(TheThumbTarget, createARMMCRegisterInfo);
}

View File

@@ -17,6 +17,7 @@
#include <string>
namespace llvm {
class MCSubtargetInfo;
class Target;
class StringRef;
@@ -24,6 +25,12 @@ extern Target TheARMTarget, TheThumbTarget;
namespace ARM_MC {
std::string ParseARMTriple(StringRef TT);
/// createARMMCSubtargetInfo - Create a ARM MCSubtargetInfo instance.
/// This is exposed so Asm parser, etc. do not need to go through
/// TargetRegistry.
MCSubtargetInfo *createARMMCSubtargetInfo(StringRef TT, StringRef CPU,
StringRef FS);
}
} // End llvm namespace