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Correct instructions for moving data between GR64 and SSE registers; also correct load i64 / store i64 from v2i64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31795 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1682,17 +1682,18 @@ def MOVDI2PDIrm : PDI<0x6E, MRMSrcMem, (ops VR128:$dst, i32mem:$src),
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"movd {$src, $dst|$dst, $src}",
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[(set VR128:$dst,
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(v4i32 (scalar_to_vector (loadi32 addr:$src))))]>;
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// SSE2 instructions with XS prefix
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def MOVQI2PQIrr : I<0x7E, MRMSrcReg, (ops VR128:$dst, VR64:$src),
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"movq {$src, $dst|$dst, $src}",
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[(set VR128:$dst,
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(v2i64 (scalar_to_vector VR64:$src)))]>, XS,
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Requires<[HasSSE2]>;
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def MOVQI2PQIrm : I<0x7E, MRMSrcMem, (ops VR128:$dst, i64mem:$src),
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"movq {$src, $dst|$dst, $src}",
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[(set VR128:$dst,
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(v2i64 (scalar_to_vector (loadi64 addr:$src))))]>, XS,
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Requires<[HasSSE2]>;
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def MOVPQI2QImr : PDI<0xD6, MRMDestMem, (ops i64mem:$dst, VR128:$src),
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"movq {$src, $dst|$dst, $src}",
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[(store (i64 (vector_extract (v2i64 VR128:$src),
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(iPTR 0))), addr:$dst)]>;
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// FIXME: may not be able to eliminate this movss with coalescing the src and
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// dest register classes are different. We really want to write this pattern
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// like this:
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@ -59,6 +59,8 @@ class RSSI<bits<8> o, Format F, dag ops, string asm, list<dag> pattern>
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: SSI<o, F, ops, asm, pattern>, REX_W;
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class RSDI<bits<8> o, Format F, dag ops, string asm, list<dag> pattern>
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: SDI<o, F, ops, asm, pattern>, REX_W;
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class RPDI<bits<8> o, Format F, dag ops, string asm, list<dag> pattern>
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: PDI<o, F, ops, asm, pattern>, REX_W;
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//===----------------------------------------------------------------------===//
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// Pattern fragments...
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@ -1076,3 +1078,27 @@ def : Pat<(or (shl GR64:$src1, CL:$amt),
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def : Pat<(store (or (shl (loadi64 addr:$dst), CL:$amt),
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(srl GR64:$src2, (sub 64, CL:$amt))), addr:$dst),
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(SHLD64mrCL addr:$dst, GR64:$src2)>;
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//===----------------------------------------------------------------------===//
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// X86-64 SSE Instructions
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//===----------------------------------------------------------------------===//
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// Move instructions...
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def MOV64toPQIrr : RPDI<0x6E, MRMSrcReg, (ops VR128:$dst, GR64:$src),
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"movq {$src, $dst|$dst, $src}",
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[(set VR128:$dst,
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(v2i64 (scalar_to_vector GR64:$src)))]>;
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def MOV64toPQIrm : RPDI<0x6E, MRMSrcMem, (ops VR128:$dst, i64mem:$src),
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"movq {$src, $dst|$dst, $src}",
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[(set VR128:$dst,
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(v2i64 (scalar_to_vector (loadi64 addr:$src))))]>;
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def MOVPQIto64rr : RPDI<0x7E, MRMDestReg, (ops GR64:$dst, VR128:$src),
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"movd {$src, $dst|$dst, $src}",
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[(set GR64:$dst, (vector_extract (v2i64 VR128:$src),
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(iPTR 0)))]>;
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def MOVPQIto64mr : RPDI<0x7E, MRMDestMem, (ops i64mem:$dst, VR128:$src),
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"movd {$src, $dst|$dst, $src}",
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[(store (i64 (vector_extract (v2i64 VR128:$src),
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(iPTR 0))), addr:$dst)]>;
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@ -509,6 +509,7 @@ MachineInstr* X86RegisterInfo::foldMemoryOperand(MachineInstr *MI,
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{ X86::MOVAPDrr, X86::MOVAPDmr },
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{ X86::MOVAPSrr, X86::MOVAPSmr },
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{ X86::MOVPDI2DIrr, X86::MOVPDI2DImr },
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{ X86::MOVPQIto64rr,X86::MOVPQIto64mr },
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{ X86::MOVPS2SSrr, X86::MOVPS2SSmr },
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{ X86::MOVSDrr, X86::MOVSDmr },
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{ X86::MOVSSrr, X86::MOVSSmr },
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@ -606,12 +607,12 @@ MachineInstr* X86RegisterInfo::foldMemoryOperand(MachineInstr *MI,
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{ X86::MOV16rr, X86::MOV16rm },
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{ X86::MOV32rr, X86::MOV32rm },
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{ X86::MOV64rr, X86::MOV64rm },
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{ X86::MOV64toPQIrr, X86::MOV64toPQIrm },
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{ X86::MOV8rr, X86::MOV8rm },
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{ X86::MOVAPDrr, X86::MOVAPDrm },
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{ X86::MOVAPSrr, X86::MOVAPSrm },
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{ X86::MOVDDUPrr, X86::MOVDDUPrm },
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{ X86::MOVDI2PDIrr, X86::MOVDI2PDIrm },
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{ X86::MOVQI2PQIrr, X86::MOVQI2PQIrm },
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{ X86::MOVSD2PDrr, X86::MOVSD2PDrm },
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{ X86::MOVSDrr, X86::MOVSDrm },
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{ X86::MOVSHDUPrr, X86::MOVSHDUPrm },
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