From ec6e62ec98afe0397c006a4036dff57cccee163e Mon Sep 17 00:00:00 2001 From: Tom Stellard Date: Thu, 17 Apr 2014 21:00:09 +0000 Subject: [PATCH] R600/SI: Change default register class for i32 to SReg_32 SIFixSGPRCopies is smart enough to handle this now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206499 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/R600/SIISelLowering.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/Target/R600/SIISelLowering.cpp b/lib/Target/R600/SIISelLowering.cpp index 9d039ddcd2e..1c7f5f00c4f 100644 --- a/lib/Target/R600/SIISelLowering.cpp +++ b/lib/Target/R600/SIISelLowering.cpp @@ -35,7 +35,7 @@ SITargetLowering::SITargetLowering(TargetMachine &TM) : addRegisterClass(MVT::v32i8, &AMDGPU::SReg_256RegClass); addRegisterClass(MVT::v64i8, &AMDGPU::SReg_512RegClass); - addRegisterClass(MVT::i32, &AMDGPU::VSrc_32RegClass); + addRegisterClass(MVT::i32, &AMDGPU::SReg_32RegClass); addRegisterClass(MVT::f32, &AMDGPU::VSrc_32RegClass); addRegisterClass(MVT::f64, &AMDGPU::VSrc_64RegClass);