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Add printer support for Pseudo instructions

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5150 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2002-12-25 05:09:01 +00:00
parent ba4ef26245
commit eca1f639eb
2 changed files with 66 additions and 36 deletions
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51
lib/Target/X86/Printer.cpp
View File

@ -111,13 +111,13 @@ static void printOp(std::ostream &O, const MachineOperand &MO,
static const std::string sizePtr (const MachineInstrDescriptor &Desc) { static const std::string sizePtr (const MachineInstrDescriptor &Desc) {
switch (Desc.TSFlags & X86II::ArgMask) { switch (Desc.TSFlags & X86II::ArgMask) {
default: assert(0 && "Unknown arg size!");
case X86II::Arg8: return "BYTE PTR"; case X86II::Arg8: return "BYTE PTR";
case X86II::Arg16: return "WORD PTR"; case X86II::Arg16: return "WORD PTR";
case X86II::Arg32: return "DWORD PTR"; case X86II::Arg32: return "DWORD PTR";
case X86II::Arg64: return "QWORD PTR"; case X86II::ArgF32: return "DWORD PTR";
case X86II::Arg80: return "XWORD PTR"; case X86II::ArgF64: return "QWORD PTR";
case X86II::Arg128: return "128BIT PTR"; // dunno what the real one is case X86II::ArgF80: return "XWORD PTR";
default: return "<SIZE?> PTR"; // crack being smoked
} }
} }
@ -157,23 +157,38 @@ void X86InstrInfo::print(const MachineInstr *MI, std::ostream &O,
unsigned Opcode = MI->getOpcode(); unsigned Opcode = MI->getOpcode();
const MachineInstrDescriptor &Desc = get(Opcode); const MachineInstrDescriptor &Desc = get(Opcode);
if (Opcode == X86::PHI) { switch (Desc.TSFlags & X86II::FormMask) {
printOp(O, MI->getOperand(0), RI); case X86II::Pseudo:
O << " = phi "; if (Opcode == X86::PHI) {
for (unsigned i = 1, e = MI->getNumOperands(); i != e; i+=2) { printOp(O, MI->getOperand(0), RI);
if (i != 1) O << ", "; O << " = phi ";
O << "["; for (unsigned i = 1, e = MI->getNumOperands(); i != e; i+=2) {
printOp(O, MI->getOperand(i), RI); if (i != 1) O << ", ";
O << ", "; O << "[";
printOp(O, MI->getOperand(i+1), RI); printOp(O, MI->getOperand(i), RI);
O << "]"; O << ", ";
printOp(O, MI->getOperand(i+1), RI);
O << "]";
}
} else {
unsigned i = 0;
if (MI->getNumOperands() && MI->getOperand(0).opIsDef()) {
printOp(O, MI->getOperand(0), RI);
O << " = ";
++i;
}
O << getName(MI->getOpcode());
for (unsigned e = MI->getNumOperands(); i != e; ++i) {
O << " ";
if (MI->getOperand(i).opIsDef()) O << "*";
printOp(O, MI->getOperand(i), RI);
if (MI->getOperand(i).opIsDef()) O << "*";
}
} }
O << "\n"; O << "\n";
return; return;
}
switch (Desc.TSFlags & X86II::FormMask) {
case X86II::RawFrm: case X86II::RawFrm:
// The accepted forms of Raw instructions are: // The accepted forms of Raw instructions are:
// 1. nop - No operand required // 1. nop - No operand required
@ -182,7 +197,7 @@ void X86InstrInfo::print(const MachineInstr *MI, std::ostream &O,
assert(MI->getNumOperands() == 0 || assert(MI->getNumOperands() == 0 ||
(MI->getNumOperands() == 1 && MI->getOperand(0).isPCRelativeDisp())&& (MI->getNumOperands() == 1 && MI->getOperand(0).isPCRelativeDisp())&&
"Illegal raw instruction!"); "Illegal raw instruction!");
O << getName(MI->getOpCode()) << " "; O << getName(MI->getOpcode()) << " ";
if (MI->getNumOperands() == 1) { if (MI->getNumOperands() == 1) {
printOp(O, MI->getOperand(0), RI); printOp(O, MI->getOperand(0), RI);

51
lib/Target/X86/X86AsmPrinter.cpp
View File

@ -111,13 +111,13 @@ static void printOp(std::ostream &O, const MachineOperand &MO,
static const std::string sizePtr (const MachineInstrDescriptor &Desc) { static const std::string sizePtr (const MachineInstrDescriptor &Desc) {
switch (Desc.TSFlags & X86II::ArgMask) { switch (Desc.TSFlags & X86II::ArgMask) {
default: assert(0 && "Unknown arg size!");
case X86II::Arg8: return "BYTE PTR"; case X86II::Arg8: return "BYTE PTR";
case X86II::Arg16: return "WORD PTR"; case X86II::Arg16: return "WORD PTR";
case X86II::Arg32: return "DWORD PTR"; case X86II::Arg32: return "DWORD PTR";
case X86II::Arg64: return "QWORD PTR"; case X86II::ArgF32: return "DWORD PTR";
case X86II::Arg80: return "XWORD PTR"; case X86II::ArgF64: return "QWORD PTR";
case X86II::Arg128: return "128BIT PTR"; // dunno what the real one is case X86II::ArgF80: return "XWORD PTR";
default: return "<SIZE?> PTR"; // crack being smoked
} }
} }
@ -157,23 +157,38 @@ void X86InstrInfo::print(const MachineInstr *MI, std::ostream &O,
unsigned Opcode = MI->getOpcode(); unsigned Opcode = MI->getOpcode();
const MachineInstrDescriptor &Desc = get(Opcode); const MachineInstrDescriptor &Desc = get(Opcode);
if (Opcode == X86::PHI) { switch (Desc.TSFlags & X86II::FormMask) {
printOp(O, MI->getOperand(0), RI); case X86II::Pseudo:
O << " = phi "; if (Opcode == X86::PHI) {
for (unsigned i = 1, e = MI->getNumOperands(); i != e; i+=2) { printOp(O, MI->getOperand(0), RI);
if (i != 1) O << ", "; O << " = phi ";
O << "["; for (unsigned i = 1, e = MI->getNumOperands(); i != e; i+=2) {
printOp(O, MI->getOperand(i), RI); if (i != 1) O << ", ";
O << ", "; O << "[";
printOp(O, MI->getOperand(i+1), RI); printOp(O, MI->getOperand(i), RI);
O << "]"; O << ", ";
printOp(O, MI->getOperand(i+1), RI);
O << "]";
}
} else {
unsigned i = 0;
if (MI->getNumOperands() && MI->getOperand(0).opIsDef()) {
printOp(O, MI->getOperand(0), RI);
O << " = ";
++i;
}
O << getName(MI->getOpcode());
for (unsigned e = MI->getNumOperands(); i != e; ++i) {
O << " ";
if (MI->getOperand(i).opIsDef()) O << "*";
printOp(O, MI->getOperand(i), RI);
if (MI->getOperand(i).opIsDef()) O << "*";
}
} }
O << "\n"; O << "\n";
return; return;
}
switch (Desc.TSFlags & X86II::FormMask) {
case X86II::RawFrm: case X86II::RawFrm:
// The accepted forms of Raw instructions are: // The accepted forms of Raw instructions are:
// 1. nop - No operand required // 1. nop - No operand required
@ -182,7 +197,7 @@ void X86InstrInfo::print(const MachineInstr *MI, std::ostream &O,
assert(MI->getNumOperands() == 0 || assert(MI->getNumOperands() == 0 ||
(MI->getNumOperands() == 1 && MI->getOperand(0).isPCRelativeDisp())&& (MI->getNumOperands() == 1 && MI->getOperand(0).isPCRelativeDisp())&&
"Illegal raw instruction!"); "Illegal raw instruction!");
O << getName(MI->getOpCode()) << " "; O << getName(MI->getOpcode()) << " ";
if (MI->getNumOperands() == 1) { if (MI->getNumOperands() == 1) {
printOp(O, MI->getOperand(0), RI); printOp(O, MI->getOperand(0), RI);