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https://github.com/c64scene-ar/llvm-6502.git
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Another nice speedup for the register allocator. This time, we replace
the Virt2PhysRegMap std::map with an std::vector. This speeds up the register allocator another (almost) 40%, from .72->.45s in a release build of LLC on 253.perlbmk. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11219 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -44,9 +44,26 @@ namespace {
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std::map<unsigned, int> StackSlotForVirtReg;
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std::map<unsigned, int> StackSlotForVirtReg;
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// Virt2PhysRegMap - This map contains entries for each virtual register
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// Virt2PhysRegMap - This map contains entries for each virtual register
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// that is currently available in a physical register.
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// that is currently available in a physical register. This is "logically"
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// a map from virtual register numbers to physical register numbers.
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// Instead of using a map, however, which is slow, we use a vector. The
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// index is the VREG number - FirstVirtualRegister. If the entry is zero,
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// then it is logically "not in the map".
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//
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//
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std::map<unsigned, unsigned> Virt2PhysRegMap;
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std::vector<unsigned> Virt2PhysRegMap;
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unsigned &getVirt2PhysRegMapSlot(unsigned VirtReg) {
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assert(VirtReg >= MRegisterInfo::FirstVirtualRegister &&"Illegal VREG #");
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assert(VirtReg-MRegisterInfo::FirstVirtualRegister <Virt2PhysRegMap.size()
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&& "VirtReg not in map!");
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return Virt2PhysRegMap[VirtReg-MRegisterInfo::FirstVirtualRegister];
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}
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unsigned &getOrInsertVirt2PhysRegMapSlot(unsigned VirtReg) {
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assert(VirtReg >= MRegisterInfo::FirstVirtualRegister &&"Illegal VREG #");
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if (VirtReg-MRegisterInfo::FirstVirtualRegister >= Virt2PhysRegMap.size())
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Virt2PhysRegMap.resize(VirtReg-MRegisterInfo::FirstVirtualRegister+1);
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return Virt2PhysRegMap[VirtReg-MRegisterInfo::FirstVirtualRegister];
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}
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// PhysRegsUsed - This array is effectively a map, containing entries for
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// PhysRegsUsed - This array is effectively a map, containing entries for
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// each physical register that currently has a value (ie, it is in
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// each physical register that currently has a value (ie, it is in
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@ -263,7 +280,8 @@ void RA::spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
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RegInfo->storeRegToStackSlot(MBB, I, PhysReg, FrameIndex, RC);
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RegInfo->storeRegToStackSlot(MBB, I, PhysReg, FrameIndex, RC);
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++NumSpilled; // Update statistics
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++NumSpilled; // Update statistics
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}
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}
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Virt2PhysRegMap.erase(VirtReg); // VirtReg no longer available
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getVirt2PhysRegMapSlot(VirtReg) = 0; // VirtReg no longer available
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DEBUG(std::cerr << "\n");
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DEBUG(std::cerr << "\n");
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removePhysReg(PhysReg);
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removePhysReg(PhysReg);
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@ -301,7 +319,7 @@ void RA::assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg) {
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// Update information to note the fact that this register was just used, and
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// Update information to note the fact that this register was just used, and
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// it holds VirtReg.
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// it holds VirtReg.
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PhysRegsUsed[PhysReg] = VirtReg;
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PhysRegsUsed[PhysReg] = VirtReg;
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Virt2PhysRegMap[VirtReg] = PhysReg;
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getOrInsertVirt2PhysRegMapSlot(VirtReg) = PhysReg;
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PhysRegsUseOrder.push_back(PhysReg); // New use of PhysReg
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PhysRegsUseOrder.push_back(PhysReg); // New use of PhysReg
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}
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}
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@ -371,7 +389,7 @@ void RA::liberatePhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
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// Update our internal state to indicate that PhysReg is available and Reg
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// Update our internal state to indicate that PhysReg is available and Reg
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// isn't.
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// isn't.
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Virt2PhysRegMap.erase(VirtReg);
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getVirt2PhysRegMapSlot[VirtReg] = 0;
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removePhysReg(PhysReg); // Free the physreg
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removePhysReg(PhysReg); // Free the physreg
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// Move reference over to new register...
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// Move reference over to new register...
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@ -453,10 +471,9 @@ unsigned RA::getReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
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unsigned RA::reloadVirtReg(MachineBasicBlock &MBB,
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unsigned RA::reloadVirtReg(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator &I,
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MachineBasicBlock::iterator &I,
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unsigned VirtReg) {
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unsigned VirtReg) {
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std::map<unsigned, unsigned>::iterator It = Virt2PhysRegMap.find(VirtReg);
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if (unsigned PR = getOrInsertVirt2PhysRegMapSlot(VirtReg)) {
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if (It != Virt2PhysRegMap.end()) {
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MarkPhysRegRecentlyUsed(PR);
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MarkPhysRegRecentlyUsed(It->second);
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return PR; // Already have this value available!
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return It->second; // Already have this value available!
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}
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}
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unsigned PhysReg = getReg(MBB, I, VirtReg);
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unsigned PhysReg = getReg(MBB, I, VirtReg);
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@ -522,11 +539,10 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
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unsigned VirtReg = KI->second;
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unsigned VirtReg = KI->second;
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unsigned PhysReg = VirtReg;
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unsigned PhysReg = VirtReg;
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if (MRegisterInfo::isVirtualRegister(VirtReg)) {
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if (MRegisterInfo::isVirtualRegister(VirtReg)) {
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std::map<unsigned, unsigned>::iterator I =
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unsigned &PhysRegSlot = getVirt2PhysRegMapSlot(VirtReg);
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Virt2PhysRegMap.find(VirtReg);
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PhysReg = PhysRegSlot;
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assert(I != Virt2PhysRegMap.end());
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assert(PhysReg != 0);
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PhysReg = I->second;
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PhysRegSlot = 0;
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Virt2PhysRegMap.erase(I);
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}
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}
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if (PhysReg) {
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if (PhysReg) {
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@ -579,14 +595,8 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
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unsigned DestPhysReg;
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unsigned DestPhysReg;
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// If DestVirtReg already has a value, use it.
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// If DestVirtReg already has a value, use it.
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std::map<unsigned, unsigned>::iterator DestI =
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if (!(DestPhysReg = getOrInsertVirt2PhysRegMapSlot(DestVirtReg)))
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Virt2PhysRegMap.find(DestVirtReg);
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if (DestI != Virt2PhysRegMap.end()) {
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DestPhysReg = DestI->second;
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}
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else {
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DestPhysReg = getReg(MBB, I, DestVirtReg);
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DestPhysReg = getReg(MBB, I, DestVirtReg);
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}
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markVirtRegModified(DestVirtReg);
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markVirtRegModified(DestVirtReg);
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MI->SetMachineOperandReg(i, DestPhysReg); // Assign the output register
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MI->SetMachineOperandReg(i, DestPhysReg); // Assign the output register
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}
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}
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@ -600,11 +610,10 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
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unsigned VirtReg = KI->second;
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unsigned VirtReg = KI->second;
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unsigned PhysReg = VirtReg;
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unsigned PhysReg = VirtReg;
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if (MRegisterInfo::isVirtualRegister(VirtReg)) {
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if (MRegisterInfo::isVirtualRegister(VirtReg)) {
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std::map<unsigned, unsigned>::iterator I =
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unsigned &PhysRegSlot = getVirt2PhysRegMapSlot(VirtReg);
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Virt2PhysRegMap.find(VirtReg);
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PhysReg = PhysRegSlot;
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assert(I != Virt2PhysRegMap.end());
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assert(PhysReg != 0);
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PhysReg = I->second;
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PhysRegSlot = 0;
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Virt2PhysRegMap.erase(I);
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}
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}
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if (PhysReg) {
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if (PhysReg) {
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@ -631,12 +640,15 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
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else
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else
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removePhysReg(i);
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removePhysReg(i);
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for (std::map<unsigned, unsigned>::iterator I = Virt2PhysRegMap.begin(),
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#ifndef NDEBUG
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E = Virt2PhysRegMap.end(); I != E; ++I)
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bool AllOk = true;
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std::cerr << "Register still mapped: " << I->first << " -> "
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for (unsigned i = 0, e = Virt2PhysRegMap.size(); i != e; ++i)
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<< I->second << "\n";
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if (unsigned PR = Virt2PhysRegMap[i]) {
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std::cerr << "Register still mapped: " << i << " -> " << PR << "\n";
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assert(Virt2PhysRegMap.empty() && "Virtual registers still in phys regs?");
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AllOk = false;
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}
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assert(AllOk && "Virtual registers still in phys regs?");
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#endif
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// Clear any physical register which appear live at the end of the basic
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// Clear any physical register which appear live at the end of the basic
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// block, but which do not hold any virtual registers. e.g., the stack
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// block, but which do not hold any virtual registers. e.g., the stack
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@ -655,6 +667,11 @@ bool RA::runOnMachineFunction(MachineFunction &Fn) {
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memset(PhysRegsUsed, -1, RegInfo->getNumRegs()*sizeof(unsigned));
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memset(PhysRegsUsed, -1, RegInfo->getNumRegs()*sizeof(unsigned));
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// Reserve some space for a moderate number of registers. If we know what the
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// max virtual register number was we could use that instead and save some
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// runtime overhead...
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Virt2PhysRegMap.resize(1024);
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if (!DisableKill)
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if (!DisableKill)
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LV = &getAnalysis<LiveVariables>();
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LV = &getAnalysis<LiveVariables>();
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@ -665,6 +682,7 @@ bool RA::runOnMachineFunction(MachineFunction &Fn) {
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StackSlotForVirtReg.clear();
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StackSlotForVirtReg.clear();
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VirtRegModified.clear();
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VirtRegModified.clear();
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Virt2PhysRegMap.clear();
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return true;
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return true;
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}
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}
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