6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-13 20:32:21 +00:00
Code Issues Projects Releases Wiki Activity

Enable convertToThreeAddress for X86 by default.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42655 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2007-10-05 22:31:10 +00:00
parent 5c4cd0d82e
commit ecf80ac68a
4 changed files with 3 additions and 12 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
lib/Target/X86/X86InstrInfo.cpp
View File

@ -22,15 +22,8 @@
#include "llvm/CodeGen/LiveVariables.h" #include "llvm/CodeGen/LiveVariables.h"
#include "llvm/CodeGen/SSARegMap.h" #include "llvm/CodeGen/SSARegMap.h"
#include "llvm/Target/TargetOptions.h" #include "llvm/Target/TargetOptions.h"
#include "llvm/Support/CommandLine.h"
using namespace llvm; using namespace llvm;
namespace {
cl::opt<bool>
EnableConvert3Addr("enable-x86-conv-3-addr",
cl::desc("Enable convertToThreeAddress for X86"));
}
X86InstrInfo::X86InstrInfo(X86TargetMachine &tm) X86InstrInfo::X86InstrInfo(X86TargetMachine &tm)
: TargetInstrInfo(X86Insts, array_lengthof(X86Insts)), : TargetInstrInfo(X86Insts, array_lengthof(X86Insts)),
TM(tm), RI(tm, *this) { TM(tm), RI(tm, *this) {
@ -154,8 +147,6 @@ bool X86InstrInfo::isReallyTriviallyReMaterializable(MachineInstr *MI) const {
/// hasLiveCondCodeDef - True if MI has a condition code def, e.g. EFLAGS, that /// hasLiveCondCodeDef - True if MI has a condition code def, e.g. EFLAGS, that
/// is not marked dead. /// is not marked dead.
static bool hasLiveCondCodeDef(MachineInstr *MI) { static bool hasLiveCondCodeDef(MachineInstr *MI) {
if (!EnableConvert3Addr)
return true;
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
MachineOperand &MO = MI->getOperand(i); MachineOperand &MO = MI->getOperand(i);
if (MO.isRegister() && MO.isDef() && if (MO.isRegister() && MO.isDef() &&

2
test/CodeGen/X86/2006-05-02-InstrSched2.ll
View File

@ -1,5 +1,5 @@
; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -stats |& \ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -stats |& \
; RUN: grep asm-printer | grep 16 ; RUN: grep asm-printer | grep 15
void %_ZN9__gnu_cxx9hashtableISt4pairIKPKciES3_NS_4hashIS3_EESt10_Select1stIS5_E5eqstrSaIiEE14find_or_insertERKS5__cond_true456.i(sbyte* %tmp435.i, uint* %tmp449.i.out) { void %_ZN9__gnu_cxx9hashtableISt4pairIKPKciES3_NS_4hashIS3_EESt10_Select1stIS5_E5eqstrSaIiEE14find_or_insertERKS5__cond_true456.i(sbyte* %tmp435.i, uint* %tmp449.i.out) {
newFuncRoot: newFuncRoot:

2
test/CodeGen/X86/2006-05-11-InstrSched.ll
View File

@ -1,5 +1,5 @@
; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -stats |&\ ; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -stats |&\
; RUN: grep {asm-printer} | grep 33 ; RUN: grep {asm-printer} | grep 32
target datalayout = "e-p:32:32" target datalayout = "e-p:32:32"
define void @foo(i32* %mc, i32* %bp, i32* %ms, i32* %xmb, i32* %mpp, i32* %tpmm, i32* %ip, i32* %tpim, i32* %dpp, i32* %tpdm, i32* %bpi, i32 %M) { define void @foo(i32* %mc, i32* %bp, i32* %ms, i32* %xmb, i32* %mpp, i32* %tpmm, i32* %ip, i32* %tpim, i32* %dpp, i32* %tpdm, i32* %bpi, i32 %M) {

2
test/CodeGen/X86/loop-strength-reduce2.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=i686-apple-darwin -relocation-model=pic | not grep lea ; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=i686-apple-darwin -relocation-model=pic | grep '\$pb' | grep mov
; ;
; Make sure the PIC label flags2-"L1$pb" is not moved up to the preheader. ; Make sure the PIC label flags2-"L1$pb" is not moved up to the preheader.