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* Eliminate a bunch of inline functions.
* Convert callers to use BuildMI instead git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5286 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
parent
9f2b7ffe05
commit
ed4fb8f3ec
@ -8,12 +8,11 @@
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#ifndef LLVM_CODEGEN_INSTR_SELECTION_SUPPORT_H
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#define LLVM_CODEGEN_INSTR_SELECTION_SUPPORT_H
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#include "llvm/Instruction.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "Support/DataTypes.h"
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class InstructionNode;
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class TargetMachine;
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class Instruction;
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//---------------------------------------------------------------------------
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// Function GetConstantValueAsUnsignedInt
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@ -80,7 +79,7 @@ Value* GetMemInstArgs (InstructionNode* memInstrNode,
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// in the machine instruction the 3 operands (arg1, arg2
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// and result) should go.
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//
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// RETURN VALUE: unsigned int flags, where
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// RETURN VALUE: unsigned flags, where
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// flags & 0x01 => operand 1 is constant and needs a register
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// flags & 0x02 => operand 2 is constant and needs a register
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//------------------------------------------------------------------------
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@ -115,7 +114,7 @@ Create1OperandInstr(MachineOpCode opCode, Value* argVal1)
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}
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inline MachineInstr*
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Create1OperandInstr_UImmed(MachineOpCode opCode, unsigned int unextendedImmed)
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Create1OperandInstr_UImmed(MachineOpCode opCode, unsigned unextendedImmed)
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{
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MachineInstr* M = new MachineInstr(opCode);
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M->SetMachineOperandConst(0, MachineOperand::MO_UnextendedImmed,
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@ -163,7 +162,7 @@ Create2OperandInstr(MachineOpCode opCode,
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inline MachineInstr*
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Create2OperandInstr_UImmed(MachineOpCode opCode,
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unsigned int unextendedImmed, Value* argVal2)
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unsigned unextendedImmed, Value* argVal2)
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{
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MachineInstr* M = new MachineInstr(opCode);
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M->SetMachineOperandConst(0, MachineOperand::MO_UnextendedImmed,
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@ -195,7 +194,7 @@ Create2OperandInstr_Addr(MachineOpCode opCode,
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inline MachineInstr*
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Create2OperandInstr_Reg(MachineOpCode opCode,
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Value* argVal1, unsigned int regNum)
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Value* argVal1, unsigned regNum)
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{
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MachineInstr* M = new MachineInstr(opCode);
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M->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister, argVal1);
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@ -205,7 +204,7 @@ Create2OperandInstr_Reg(MachineOpCode opCode,
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inline MachineInstr*
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Create2OperandInstr_Reg(MachineOpCode opCode,
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unsigned int regNum1, unsigned int regNum2)
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unsigned regNum1, unsigned regNum2)
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{
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MachineInstr* M = new MachineInstr(opCode);
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@ -214,67 +213,9 @@ Create2OperandInstr_Reg(MachineOpCode opCode,
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return M;
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}
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inline MachineInstr*
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Create3OperandInstr(MachineOpCode opCode,
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Value* argVal1, MachineOperand::MachineOperandType type1,
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Value* argVal2, MachineOperand::MachineOperandType type2,
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Value* argVal3, MachineOperand::MachineOperandType type3)
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{
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MachineInstr* M = new MachineInstr(opCode);
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M->SetMachineOperandVal(0, type1, argVal1);
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M->SetMachineOperandVal(1, type2, argVal2);
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M->SetMachineOperandVal(2, type3, argVal3);
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return M;
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}
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inline MachineInstr*
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Create3OperandInstr(MachineOpCode opCode, Value* argVal1,
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Value* argVal2, Value* argVal3)
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{
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return Create3OperandInstr(opCode,
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argVal1, MachineOperand::MO_VirtualRegister,
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argVal2, MachineOperand::MO_VirtualRegister,
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argVal3, MachineOperand::MO_VirtualRegister);
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}
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inline MachineInstr*
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Create3OperandInstr_UImmed(MachineOpCode opCode, Value* argVal1,
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unsigned int unextendedImmed, Value* argVal3)
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{
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MachineInstr* M = new MachineInstr(opCode);
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M->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister, argVal1);
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M->SetMachineOperandConst(1, MachineOperand::MO_UnextendedImmed,
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unextendedImmed);
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M->SetMachineOperandVal(2, MachineOperand::MO_VirtualRegister, argVal3);
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return M;
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}
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inline MachineInstr*
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Create3OperandInstr_SImmed(MachineOpCode opCode, Value* argVal1,
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int signExtendedImmed, Value* argVal3)
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{
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MachineInstr* M = new MachineInstr(opCode);
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M->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister, argVal1);
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M->SetMachineOperandConst(1, MachineOperand::MO_SignExtendedImmed,
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signExtendedImmed);
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M->SetMachineOperandVal(2, MachineOperand::MO_VirtualRegister, argVal3);
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return M;
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}
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inline MachineInstr*
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Create3OperandInstr_Addr(MachineOpCode opCode, Value* argVal1,
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Value* label, Value* argVal3)
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{
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MachineInstr* M = new MachineInstr(opCode);
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M->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister, argVal1);
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M->SetMachineOperandVal(1, MachineOperand::MO_PCRelativeDisp, label);
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M->SetMachineOperandVal(2, MachineOperand::MO_VirtualRegister, argVal3);
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return M;
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}
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inline MachineInstr*
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Create3OperandInstr_Reg(MachineOpCode opCode, Value* argVal1,
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unsigned int regNum, Value* argVal3)
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unsigned regNum, Value* argVal3)
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{
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MachineInstr* M = new MachineInstr(opCode);
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M->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister, argVal1);
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@ -284,8 +225,8 @@ Create3OperandInstr_Reg(MachineOpCode opCode, Value* argVal1,
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}
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inline MachineInstr*
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Create3OperandInstr_Reg(MachineOpCode opCode, unsigned int regNum1,
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unsigned int regNum2, Value* argVal3)
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Create3OperandInstr_Reg(MachineOpCode opCode, unsigned regNum1,
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unsigned regNum2, Value* argVal3)
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{
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MachineInstr* M = new MachineInstr(opCode);
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@ -296,8 +237,8 @@ Create3OperandInstr_Reg(MachineOpCode opCode, unsigned int regNum1,
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}
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inline MachineInstr*
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Create3OperandInstr_Reg(MachineOpCode opCode, unsigned int regNum1,
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unsigned int regNum2, unsigned int regNum3)
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Create3OperandInstr_Reg(MachineOpCode opCode, unsigned regNum1,
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unsigned regNum2, unsigned regNum3)
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{
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MachineInstr* M = new MachineInstr(opCode);
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@ -320,7 +261,7 @@ MachineOperand::MachineOperandType ChooseRegOrImmed(
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MachineOpCode opCode,
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const TargetMachine& targetMachine,
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bool canUseImmed,
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unsigned int& getMachineRegNum,
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unsigned& getMachineRegNum,
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int64_t& getImmedValue);
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MachineOperand::MachineOperandType ChooseRegOrImmed(int64_t intValue,
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@ -328,7 +269,7 @@ MachineOperand::MachineOperandType ChooseRegOrImmed(int64_t intValue,
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MachineOpCode opCode,
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const TargetMachine& target,
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bool canUseImmed,
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unsigned int& getMachineRegNum,
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unsigned& getMachineRegNum,
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int64_t& getImmedValue);
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