6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-04-05 01:31:05 +00:00
Code Issues Projects Releases Wiki Activity

Add a new node

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27230 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2006-03-28 19:54:11 +00:00
parent 4fbdd59f4f
commit eda6dfd5e4
1 changed files with 9 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
include/llvm/CodeGen/SelectionDAGNodes.h
View File

@ -189,6 +189,15 @@ namespace ISD {
/// element number IDX.
EXTRACT_VECTOR_ELT,
/// VVECTOR_SHUFFLE(VEC1, VEC2, SHUFFLEVEC, COUNT,TYPE) - Returns a vector,
/// of the same type as VEC1/VEC2. SHUFFLEVEC is a VBUILD_VECTOR of
/// constant int values that indicate which value each result element will
/// get. The elements of VEC1/VEC2 are enumerated in order. This is quite
/// similar to the Altivec 'vperm' instruction, except that the indices must
/// be constants and are in terms of the element size of VEC1/VEC2, not in
/// terms of bytes.
VVECTOR_SHUFFLE,
/// VECTOR_SHUFFLE(VEC1, VEC2, SHUFFLEVEC) - Returns a vector, of the same
/// type as VEC1/VEC2. SHUFFLEVEC is a BUILD_VECTOR of constant int values
/// (regardless of whether its datatype is legal or not) that indicate