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PPC: Optimize rldicl generation for masked shifts

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Masking operations (where only some number of the low bits are being kept) are
selected to rldicl(x, 0, mb). If x is a logical right shift (which would become
rldicl(y, 64-n, n)), we might be able to fold the two instructions together:

  rldicl(rldicl(x, 64-n, n), 0, mb) -> rldicl(x, 64-n, mb) for n <= mb

The right shift is really a left rotate followed by a mask, and if the explicit
mask is a more-restrictive sub-mask of the mask implied by the shift, only one
rldicl is needed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195185 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Hal Finkel 2013-11-20 01:10:15 +00:00
parent 9259787e4f
commit eda8f6708d
2 changed files with 31 additions and 1 deletions
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16
lib/Target/PowerPC/PPCISelDAGToDAG.cpp
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@ -1122,7 +1122,21 @@ SDNode *PPCDAGToDAGISel::Select(SDNode *N) {
isMask_64(Imm64)) {
SDValue Val = N->getOperand(0);
MB = 64 - CountTrailingOnes_64(Imm64);
SDValue Ops[] = { Val, getI32Imm(0), getI32Imm(MB) };
SH = 0;
// If the operand is a logical right shift, we can fold it into this
// instruction: rldicl(rldicl(x, 64-n, n), 0, mb) -> rldicl(x, 64-n, mb)
// for n <= mb. The right shift is really a left rotate followed by a
// mask, and this mask is a more-restrictive sub-mask of the mask implied
// by the shift.
if (Val.getOpcode() == ISD::SRL &&
isInt32Immediate(Val.getOperand(1).getNode(), Imm) && Imm <= MB) {
assert(Imm < 64 && "Illegal shift amount");
Val = Val.getOperand(0);
SH = 64 - Imm;
}
SDValue Ops[] = { Val, getI32Imm(SH), getI32Imm(MB) };
return CurDAG->SelectNodeTo(N, PPC::RLDICL, MVT::i64, Ops, 3);
}
// AND X, 0 -> 0, not "rlwinm 32".

16
test/CodeGen/PowerPC/srl-mask.ll Normal file
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@ -0,0 +1,16 @@
; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=a2 | FileCheck %s
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
target triple = "powerpc64-unknown-linux-gnu"
define i64 @foo(i64 %x) #0 {
entry:
; CHECK-LABEL: @foo
%a = lshr i64 %x, 35
%b = and i64 %a, 65535
; CHECK: rldicl 3, 3, 29, 48
ret i64 %b
; CHECK: blr
}
attributes #0 = { nounwind }