From ee639f1760ea3d22c46b141393eab611a4de2200 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Thu, 10 Mar 2005 20:55:51 +0000 Subject: [PATCH] Fix a bug where we would incorrectly do a sign ext instead of a zero ext because we were checking the wrong thing. Thanks to andrew for pointing this out! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20554 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index fb52d11bd3d..d4804d98227 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -961,7 +961,7 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,SDOperand N1, // Extending a constant? Just return the constant. if (ConstantSDNode *N1C = dyn_cast(N1.Val)) { SDOperand Tmp = getNode(ISD::TRUNCATE, EVT, N1); - if (N1.getOpcode() == ISD::ZERO_EXTEND_INREG) + if (Opcode == ISD::ZERO_EXTEND_INREG) return getNode(ISD::ZERO_EXTEND, VT, Tmp); else return getNode(ISD::SIGN_EXTEND, VT, Tmp);