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Previously v2i32 vectors were legalized to v4i32. Now, they are legalized to

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v2i64. These tests do not check MMX nor zmoving into them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142182 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Nadav Rotem 2011-10-17 06:59:01 +00:00
parent 4b2dc74d3f
commit ee6fd6a2b2
2 changed files with 0 additions and 43 deletions
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28
test/CodeGen/X86/mmx-vzmovl-2.ll
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; RUN: llc < %s -mtriple=x86_64-linux -mattr=+mmx,+sse2 | grep pxor | count 1
; RUN: llc < %s -mtriple=x86_64-linux -mattr=+mmx,+sse2 | grep punpcklqdq | count 1
%struct.vS1024 = type { [8 x <4 x i32>] }
%struct.vS512 = type { [4 x <4 x i32>] }
declare x86_mmx @llvm.x86.mmx.psrli.q(x86_mmx, i32) nounwind readnone
define void @t() nounwind {
entry:
br label %bb554
bb554: ; preds = %bb554, %entry
%sum.0.reg2mem.0 = phi <1 x i64> [ %tmp562, %bb554 ], [ zeroinitializer, %entry ] ; <<1 x i64>> [#uses=1]
%0 = load x86_mmx* null, align 8 ; <<1 x i64>> [#uses=2]
%1 = bitcast x86_mmx %0 to <2 x i32> ; <<2 x i32>> [#uses=1]
%tmp555 = and <2 x i32> %1, < i32 -1, i32 0 > ; <<2 x i32>> [#uses=1]
%2 = bitcast <2 x i32> %tmp555 to x86_mmx ; <<1 x i64>> [#uses=1]
%3 = call x86_mmx @llvm.x86.mmx.psrli.q(x86_mmx %0, i32 32) nounwind readnone ; <<1 x i64>> [#uses=1]
store <1 x i64> %sum.0.reg2mem.0, <1 x i64>* null
%tmp3 = bitcast x86_mmx %2 to <1 x i64>
%tmp558 = add <1 x i64> %sum.0.reg2mem.0, %tmp3 ; <<1 x i64>> [#uses=1]
%tmp5 = bitcast <1 x i64> %tmp558 to x86_mmx
%4 = call x86_mmx @llvm.x86.mmx.psrli.q(x86_mmx %tmp5, i32 32) nounwind readnone ; <<1 x i64>> [#uses=1]
%tmp6 = bitcast x86_mmx %4 to <1 x i64>
%tmp7 = bitcast x86_mmx %3 to <1 x i64>
%tmp562 = add <1 x i64> %tmp6, %tmp7 ; <<1 x i64>> [#uses=1]
br label %bb554
}

15
test/CodeGen/X86/mmx-vzmovl.ll
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; RUN: llc < %s -mtriple=x86_64-linux -mattr=+mmx,+sse2 | grep movq | count 2
; There are no MMX operations here; this is promoted to XMM.
define void @foo(<1 x i64>* %a, <1 x i64>* %b) nounwind {
entry:
%0 = load <1 x i64>* %a, align 8 ; <<1 x i64>> [#uses=1]
%1 = bitcast <1 x i64> %0 to <2 x i32> ; <<2 x i32>> [#uses=1]
%2 = and <2 x i32> %1, < i32 -1, i32 0 > ; <<2 x i32>> [#uses=1]
%3 = bitcast <2 x i32> %2 to <1 x i64> ; <<1 x i64>> [#uses=1]
store <1 x i64> %3, <1 x i64>* %b, align 8
br label %bb2
bb2: ; preds = %entry
ret void
}