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Don't check liveness of unallocatable registers.

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This includes registers like EFLAGS and ST0-ST7. We don't check for
liveness issues in the verifier and scavenger because registers will
never be allocated from these classes.

While in SSA form, we do care about the liveness of unallocatable
unreserved registers. Liveness of EFLAGS and ST0 neds to be correct for
MachineDCE and MachineSinking.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136541 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen
2011-07-29 23:36:21 +00:00
parent 93e6f02759
commit eeb57c7701
3 changed files with 12 additions and 5 deletions
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4
lib/CodeGen/RegisterScavenging.cpp
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@@ -157,7 +157,7 @@ void RegScavenger::forward() {
if (!MO.isReg())
continue;
unsigned Reg = MO.getReg();
if (!Reg || isReserved(Reg))
if (!Reg || isReserved(Reg) || !TRI->isInAllocatableClass(Reg))
continue;
if (MO.isUse()) {
@@ -184,7 +184,7 @@ void RegScavenger::forward() {
if (!MO.isReg())
continue;
unsigned Reg = MO.getReg();
if (!Reg || isReserved(Reg))
if (!Reg || isReserved(Reg) || !TRI->isInAllocatableClass(Reg))
continue;
if (MO.isUse()) {
if (MO.isUndef())