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[XCore] Provide information about known zero bits of resource instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202393 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1770,6 +1770,34 @@ void XCoreTargetLowering::computeMaskedBitsForTargetNode(const SDValue Op,
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KnownZero.getBitWidth() - 1);
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}
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break;
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case ISD::INTRINSIC_W_CHAIN:
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{
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unsigned IntNo = cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
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switch (IntNo) {
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case Intrinsic::xcore_getts:
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// High bits are known to be zero.
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KnownZero = APInt::getHighBitsSet(KnownZero.getBitWidth(),
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KnownZero.getBitWidth() - 16);
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break;
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case Intrinsic::xcore_int:
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case Intrinsic::xcore_inct:
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// High bits are known to be zero.
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KnownZero = APInt::getHighBitsSet(KnownZero.getBitWidth(),
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KnownZero.getBitWidth() - 8);
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break;
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case Intrinsic::xcore_testct:
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// Result is either 0 or 1.
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KnownZero = APInt::getHighBitsSet(KnownZero.getBitWidth(),
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KnownZero.getBitWidth() - 1);
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break;
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case Intrinsic::xcore_testwct:
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// Result is in the range 0 - 4.
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KnownZero = APInt::getHighBitsSet(KnownZero.getBitWidth(),
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KnownZero.getBitWidth() - 3);
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break;
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}
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}
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break;
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}
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}
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52
test/CodeGen/XCore/resources_combine.ll
Normal file
52
test/CodeGen/XCore/resources_combine.ll
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@ -0,0 +1,52 @@
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; RUN: llc -march=xcore < %s | FileCheck %s
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declare i32 @llvm.xcore.int.p1i8(i8 addrspace(1)* %r)
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declare i32 @llvm.xcore.inct.p1i8(i8 addrspace(1)* %r)
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declare i32 @llvm.xcore.testct.p1i8(i8 addrspace(1)* %r)
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declare i32 @llvm.xcore.testwct.p1i8(i8 addrspace(1)* %r)
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declare i32 @llvm.xcore.getts.p1i8(i8 addrspace(1)* %r)
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define i32 @int(i8 addrspace(1)* %r) nounwind {
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; CHECK-LABEL: int:
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; CHECK: int r0, res[r0]
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; CHECK-NEXT: retsp 0
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%result = call i32 @llvm.xcore.int.p1i8(i8 addrspace(1)* %r)
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%trunc = and i32 %result, 255
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ret i32 %trunc
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}
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define i32 @inct(i8 addrspace(1)* %r) nounwind {
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; CHECK-LABEL: inct:
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; CHECK: inct r0, res[r0]
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; CHECK-NEXT: retsp 0
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%result = call i32 @llvm.xcore.inct.p1i8(i8 addrspace(1)* %r)
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%trunc = and i32 %result, 255
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ret i32 %trunc
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}
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define i32 @testct(i8 addrspace(1)* %r) nounwind {
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; CHECK-LABEL: testct:
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; CHECK: testct r0, res[r0]
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; CHECK-NEXT: retsp 0
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%result = call i32 @llvm.xcore.testct.p1i8(i8 addrspace(1)* %r)
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%trunc = and i32 %result, 1
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ret i32 %trunc
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}
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define i32 @testwct(i8 addrspace(1)* %r) nounwind {
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; CHECK-LABEL: testwct:
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; CHECK: testwct r0, res[r0]
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; CHECK-NEXT: retsp 0
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%result = call i32 @llvm.xcore.testwct.p1i8(i8 addrspace(1)* %r)
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%trunc = and i32 %result, 7
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ret i32 %trunc
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}
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define i32 @getts(i8 addrspace(1)* %r) nounwind {
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; CHECK-LABEL: getts:
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; CHECK: getts r0, res[r0]
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; CHECK-NEXT: retsp 0
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%result = call i32 @llvm.xcore.getts.p1i8(i8 addrspace(1)* %r)
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%trunc = and i32 %result, 65535
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ret i32 %result
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}
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