From ef2865a8eadffd7e346b9bc70c647578010b6afd Mon Sep 17 00:00:00 2001 From: Owen Anderson Date: Mon, 15 Aug 2011 23:38:54 +0000 Subject: [PATCH] Specify a necessary fixed bit for VLD3DUP, and otherwise rearrange the Thumb2 NEON decoding hooks to bring us closer to correctness. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137686 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/ARMInstrFormats.td | 6 ++- lib/Target/ARM/ARMInstrNEON.td | 4 +- .../ARM/Disassembler/ARMDisassembler.cpp | 37 +++++++++++-------- 3 files changed, 27 insertions(+), 20 deletions(-) diff --git a/lib/Target/ARM/ARMInstrFormats.td b/lib/Target/ARM/ARMInstrFormats.td index a3bcbff21a7..ba378ed5fed 100644 --- a/lib/Target/ARM/ARMInstrFormats.td +++ b/lib/Target/ARM/ARMInstrFormats.td @@ -1548,7 +1548,7 @@ class NeonI Predicates = [HasNEON]; - let DecoderNamespace = "NEONData"; + let DecoderNamespace = "NEON"; } // Same as NeonI except it does not have a "data type" specifier. @@ -1561,7 +1561,7 @@ class NeonXI Predicates = [HasNEON]; - let DecoderNamespace = "NEONData"; + let DecoderNamespace = "NEON"; } class NLdSt op21_20, bits<4> op11_8, bits<4> op7_4, @@ -1620,6 +1620,7 @@ class NDataI { let Inst{31-25} = 0b1111001; let PostEncoderMethod = "NEONThumb2DataIPostEncoder"; + let DecoderNamespace = "NEONData"; } class NDataXI { let Inst{31-25} = 0b1111001; let PostEncoderMethod = "NEONThumb2DataIPostEncoder"; + let DecoderNamespace = "NEONData"; } // NEON "one register and a modified immediate" format. diff --git a/lib/Target/ARM/ARMInstrNEON.td b/lib/Target/ARM/ARMInstrNEON.td index a8bbc9ec525..dbbf4039ff7 100644 --- a/lib/Target/ARM/ARMInstrNEON.td +++ b/lib/Target/ARM/ARMInstrNEON.td @@ -966,7 +966,7 @@ class VLD3DUP op7_4, string Dt> (ins addrmode6dup:$Rn), IIC_VLD3dup, "vld3", Dt, "\\{$Vd[], $dst2[], $dst3[]\\}, $Rn", "", []> { let Rm = 0b1111; - let Inst{4} = Rn{4}; + let Inst{4} = 0; let DecoderMethod = "DecodeVLD3DupInstruction"; } @@ -989,7 +989,7 @@ class VLD3DUPWB op7_4, string Dt> (ins addrmode6dup:$Rn, am6offset:$Rm), IIC_VLD3dupu, "vld3", Dt, "\\{$Vd[], $dst2[], $dst3[]\\}, $Rn$Rm", "$Rn.addr = $wb", []> { - let Inst{4} = Rn{4}; + let Inst{4} = 0; let DecoderMethod = "DecodeVLD3DupInstruction"; } diff --git a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index 852c52af8be..28dd986d65e 100644 --- a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp @@ -494,7 +494,28 @@ bool ThumbDisassembler::getInstruction(MCInst &MI, uint64_t &Size, } MI.clear(); + result = decodeNEONDupInstruction32(MI, insn32, Address, this); + if (result) { + Size = 4; + AddThumbPredicate(MI); + return true; + } + + if (fieldFromInstruction32(insn32, 24, 8) == 0xF9) { + MI.clear(); + uint32_t NEONLdStInsn = insn32; + NEONLdStInsn &= 0xF0FFFFFF; + NEONLdStInsn |= 0x04000000; + result = decodeNEONLoadStoreInstruction32(MI, NEONLdStInsn, Address, this); + if (result) { + Size = 4; + AddThumbPredicate(MI); + return true; + } + } + if (fieldFromInstruction32(insn32, 24, 4) == 0xF) { + MI.clear(); uint32_t NEONDataInsn = insn32; NEONDataInsn &= 0xF0FFFFFF; // Clear bits 27-24 NEONDataInsn |= (NEONDataInsn & 0x10000000) >> 4; // Move bit 28 to bit 24 @@ -507,22 +528,6 @@ bool ThumbDisassembler::getInstruction(MCInst &MI, uint64_t &Size, } } - MI.clear(); - result = decodeNEONLoadStoreInstruction32(MI, insn32, Address, this); - if (result) { - Size = 4; - AddThumbPredicate(MI); - return true; - } - - MI.clear(); - result = decodeNEONDupInstruction32(MI, insn32, Address, this); - if (result) { - Size = 4; - AddThumbPredicate(MI); - return true; - } - return false; }