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Fix some issues in the f16c instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156287 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -7621,7 +7621,6 @@ let Defs = [YMM0, YMM1, YMM2, YMM3, YMM4, YMM5, YMM6, YMM7,
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// Half precision conversion instructions
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//===----------------------------------------------------------------------===//
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multiclass f16c_ph2ps<RegisterClass RC, X86MemOperand x86memop, Intrinsic Int> {
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let Predicates = [HasAVX, HasF16C] in {
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def rr : I<0x13, MRMSrcReg, (outs RC:$dst), (ins VR128:$src),
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"vcvtph2ps\t{$src, $dst|$dst, $src}",
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[(set RC:$dst, (Int VR128:$src))]>,
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@ -7630,27 +7629,26 @@ let Predicates = [HasAVX, HasF16C] in {
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def rm : I<0x13, MRMSrcMem, (outs RC:$dst), (ins x86memop:$src),
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"vcvtph2ps\t{$src, $dst|$dst, $src}", []>, T8, OpSize, VEX;
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}
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}
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multiclass f16c_ps2ph<RegisterClass RC, X86MemOperand x86memop, Intrinsic Int> {
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let Predicates = [HasAVX, HasF16C] in {
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def rr : Ii8<0x1D, MRMDestReg, (outs VR128:$dst),
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(ins RC:$src1, i32i8imm:$src2),
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"vcvtps2ph\t{$src2, $src1, $dst|$dst, $src1, $src2}",
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[(set VR128:$dst, (Int RC:$src1, imm:$src2))]>,
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TA, OpSize, VEX;
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let neverHasSideEffects = 1, mayLoad = 1 in
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def mr : Ii8<0x1D, MRMDestMem, (outs x86memop:$dst),
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(ins RC:$src1, i32i8imm:$src2),
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let neverHasSideEffects = 1, mayStore = 1 in
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def mr : Ii8<0x1D, MRMDestMem, (outs),
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(ins x86memop:$dst, RC:$src1, i32i8imm:$src2),
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"vcvtps2ph\t{$src2, $src1, $dst|$dst, $src1, $src2}", []>,
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TA, OpSize, VEX;
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}
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}
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defm VCVTPH2PS : f16c_ph2ps<VR128, f64mem, int_x86_vcvtph2ps_128>;
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defm VCVTPH2PSY : f16c_ph2ps<VR256, f128mem, int_x86_vcvtph2ps_256>;
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defm VCVTPS2PH : f16c_ps2ph<VR128, f64mem, int_x86_vcvtps2ph_128>;
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defm VCVTPS2PHY : f16c_ps2ph<VR256, f128mem, int_x86_vcvtps2ph_256>;
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let Predicates = [HasAVX, HasF16C] in {
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defm VCVTPH2PS : f16c_ph2ps<VR128, f64mem, int_x86_vcvtph2ps_128>;
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defm VCVTPH2PSY : f16c_ph2ps<VR256, f128mem, int_x86_vcvtph2ps_256>;
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defm VCVTPS2PH : f16c_ps2ph<VR128, f64mem, int_x86_vcvtps2ph_128>;
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defm VCVTPS2PHY : f16c_ps2ph<VR256, f128mem, int_x86_vcvtps2ph_256>;
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}
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//===----------------------------------------------------------------------===//
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// AVX2 Instructions
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