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Add the rest of the ARM so_reg encoding options (register shifted register)

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and move to a custom operand encoder. Remove the last of the special handling
stuff from ARMMCCodeEmitter::EncodeInstruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116377 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach
2010-10-12 23:53:58 +00:00
parent 8f9145b0eb
commit ef324d7044
3 changed files with 82 additions and 23 deletions
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lib/Target/ARM/ARMCodeEmitter.cpp
+2
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@@ -168,6 +168,8 @@ namespace {
const { return 0; }
unsigned getSOImmOpValue(const MachineInstr &MI, unsigned Op)
const { return 0; }
unsigned getSORegOpValue(const MachineInstr &MI, unsigned Op)
const { return 0; }
/// getMovi32Value - Return binary encoding of operand for movw/movt. If the
/// machine operand requires relocation, record the relocation and return