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ARM parsing optional datatype suffix for VAND/VEOR/VORR instructions.
rdar://10435076 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144587 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1995,6 +1995,20 @@ class NEONFPPat<dag pattern, dag result> : Pat<pattern, result> {
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// VFP/NEON Instruction aliases for type suffices.
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// VFP/NEON Instruction aliases for type suffices.
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class VFPDataTypeInstAlias<string opc, string dt, string asm, dag Result> :
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class VFPDataTypeInstAlias<string opc, string dt, string asm, dag Result> :
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InstAlias<!strconcat(opc, dt, asm), Result>;
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InstAlias<!strconcat(opc, dt, asm), Result>;
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multiclass VFPDT8InstAlias<string opc, string asm, dag Result> {
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def _8 : VFPDataTypeInstAlias<opc, ".8", asm, Result>;
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def I8 : VFPDataTypeInstAlias<opc, ".i8", asm, Result>;
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def S8 : VFPDataTypeInstAlias<opc, ".s8", asm, Result>;
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def U8 : VFPDataTypeInstAlias<opc, ".u8", asm, Result>;
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def F8 : VFPDataTypeInstAlias<opc, ".p8", asm, Result>;
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}
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multiclass VFPDT16InstAlias<string opc, string asm, dag Result> {
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def _16 : VFPDataTypeInstAlias<opc, ".16", asm, Result>;
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def I16 : VFPDataTypeInstAlias<opc, ".i16", asm, Result>;
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def S16 : VFPDataTypeInstAlias<opc, ".s16", asm, Result>;
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def U16 : VFPDataTypeInstAlias<opc, ".u16", asm, Result>;
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def F16 : VFPDataTypeInstAlias<opc, ".p16", asm, Result>;
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}
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multiclass VFPDT32InstAlias<string opc, string asm, dag Result> {
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multiclass VFPDT32InstAlias<string opc, string asm, dag Result> {
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def _32 : VFPDataTypeInstAlias<opc, ".32", asm, Result>;
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def _32 : VFPDataTypeInstAlias<opc, ".32", asm, Result>;
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def I32 : VFPDataTypeInstAlias<opc, ".i32", asm, Result>;
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def I32 : VFPDataTypeInstAlias<opc, ".i32", asm, Result>;
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@ -2011,4 +2025,9 @@ multiclass VFPDT64InstAlias<string opc, string asm, dag Result> {
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def F64 : VFPDataTypeInstAlias<opc, ".f64", asm, Result>;
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def F64 : VFPDataTypeInstAlias<opc, ".f64", asm, Result>;
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def D : VFPDataTypeInstAlias<opc, ".d", asm, Result>;
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def D : VFPDataTypeInstAlias<opc, ".d", asm, Result>;
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}
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}
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multiclass VFPDTAnyInstAlias<string opc, string asm, dag Result> {
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defm : VFPDT8InstAlias<opc, asm, Result>;
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defm : VFPDT16InstAlias<opc, asm, Result>;
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defm : VFPDT32InstAlias<opc, asm, Result>;
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defm : VFPDT64InstAlias<opc, asm, Result>;
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}
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@ -5179,3 +5179,21 @@ def : Pat<(v2f64 (bitconvert (v4i32 QPR:$src))), (v2f64 QPR:$src)>;
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def : Pat<(v2f64 (bitconvert (v8i16 QPR:$src))), (v2f64 QPR:$src)>;
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def : Pat<(v2f64 (bitconvert (v8i16 QPR:$src))), (v2f64 QPR:$src)>;
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def : Pat<(v2f64 (bitconvert (v16i8 QPR:$src))), (v2f64 QPR:$src)>;
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def : Pat<(v2f64 (bitconvert (v16i8 QPR:$src))), (v2f64 QPR:$src)>;
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def : Pat<(v2f64 (bitconvert (v4f32 QPR:$src))), (v2f64 QPR:$src)>;
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def : Pat<(v2f64 (bitconvert (v4f32 QPR:$src))), (v2f64 QPR:$src)>;
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//===----------------------------------------------------------------------===//
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// Assembler aliases
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//
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defm : VFPDTAnyInstAlias<"vand${p}", "$Vd, $Vn, $Vm",
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(VANDd DPR:$Vd, DPR:$Vn, DPR:$Vm, pred:$p)>;
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defm : VFPDTAnyInstAlias<"vand${p}", "$Vd, $Vn, $Vm",
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(VANDq QPR:$Vd, QPR:$Vn, QPR:$Vm, pred:$p)>;
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defm : VFPDTAnyInstAlias<"veor${p}", "$Vd, $Vn, $Vm",
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(VEORd DPR:$Vd, DPR:$Vn, DPR:$Vm, pred:$p)>;
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defm : VFPDTAnyInstAlias<"veor${p}", "$Vd, $Vn, $Vm",
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(VEORq QPR:$Vd, QPR:$Vn, QPR:$Vm, pred:$p)>;
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defm : VFPDTAnyInstAlias<"vorr${p}", "$Vd, $Vn, $Vm",
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(VORRd DPR:$Vd, DPR:$Vn, DPR:$Vm, pred:$p)>;
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defm : VFPDTAnyInstAlias<"vorr${p}", "$Vd, $Vn, $Vm",
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(VORRq QPR:$Vd, QPR:$Vn, QPR:$Vm, pred:$p)>;
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@ -53,3 +53,180 @@
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@ CHECK: vbsl d18, d17, d16 @ encoding: [0xb0,0x21,0x51,0xf3]
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@ CHECK: vbsl d18, d17, d16 @ encoding: [0xb0,0x21,0x51,0xf3]
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@ CHECK: vbsl q8, q10, q9 @ encoding: [0xf2,0x01,0x54,0xf3]
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@ CHECK: vbsl q8, q10, q9 @ encoding: [0xf2,0x01,0x54,0xf3]
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@ Size suffices are optional.
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veor q4, q7, q3
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veor.8 q4, q7, q3
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veor.16 q4, q7, q3
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veor.32 q4, q7, q3
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veor.64 q4, q7, q3
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veor.i8 q4, q7, q3
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veor.i16 q4, q7, q3
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veor.i32 q4, q7, q3
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veor.i64 q4, q7, q3
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veor.s8 q4, q7, q3
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veor.s16 q4, q7, q3
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veor.s32 q4, q7, q3
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veor.s64 q4, q7, q3
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veor.u8 q4, q7, q3
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veor.u16 q4, q7, q3
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veor.u32 q4, q7, q3
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veor.u64 q4, q7, q3
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veor.p8 q4, q7, q3
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veor.p16 q4, q7, q3
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veor.f32 q4, q7, q3
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veor.f64 q4, q7, q3
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veor.f q4, q7, q3
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veor.d q4, q7, q3
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@ CHECK: veor q4, q7, q3 @ encoding: [0x56,0x81,0x0e,0xf3]
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@ CHECK: veor q4, q7, q3 @ encoding: [0x56,0x81,0x0e,0xf3]
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@ CHECK: veor q4, q7, q3 @ encoding: [0x56,0x81,0x0e,0xf3]
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@ CHECK: veor q4, q7, q3 @ encoding: [0x56,0x81,0x0e,0xf3]
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@ CHECK: veor q4, q7, q3 @ encoding: [0x56,0x81,0x0e,0xf3]
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@ CHECK: veor q4, q7, q3 @ encoding: [0x56,0x81,0x0e,0xf3]
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@ CHECK: veor q4, q7, q3 @ encoding: [0x56,0x81,0x0e,0xf3]
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@ CHECK: veor q4, q7, q3 @ encoding: [0x56,0x81,0x0e,0xf3]
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@ CHECK: veor q4, q7, q3 @ encoding: [0x56,0x81,0x0e,0xf3]
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@ CHECK: veor q4, q7, q3 @ encoding: [0x56,0x81,0x0e,0xf3]
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@ CHECK: veor q4, q7, q3 @ encoding: [0x56,0x81,0x0e,0xf3]
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@ CHECK: veor q4, q7, q3 @ encoding: [0x56,0x81,0x0e,0xf3]
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@ CHECK: veor q4, q7, q3 @ encoding: [0x56,0x81,0x0e,0xf3]
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@ CHECK: veor q4, q7, q3 @ encoding: [0x56,0x81,0x0e,0xf3]
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@ CHECK: veor q4, q7, q3 @ encoding: [0x56,0x81,0x0e,0xf3]
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@ CHECK: veor q4, q7, q3 @ encoding: [0x56,0x81,0x0e,0xf3]
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@ CHECK: veor q4, q7, q3 @ encoding: [0x56,0x81,0x0e,0xf3]
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@ CHECK: veor q4, q7, q3 @ encoding: [0x56,0x81,0x0e,0xf3]
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@ CHECK: veor q4, q7, q3 @ encoding: [0x56,0x81,0x0e,0xf3]
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@ CHECK: veor q4, q7, q3 @ encoding: [0x56,0x81,0x0e,0xf3]
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@ CHECK: veor q4, q7, q3 @ encoding: [0x56,0x81,0x0e,0xf3]
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@ CHECK: veor q4, q7, q3 @ encoding: [0x56,0x81,0x0e,0xf3]
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@ CHECK: veor q4, q7, q3 @ encoding: [0x56,0x81,0x0e,0xf3]
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vand d4, d7, d3
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vand.8 d4, d7, d3
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vand.16 d4, d7, d3
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vand.32 d4, d7, d3
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vand.64 d4, d7, d3
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vand.i8 d4, d7, d3
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vand.i16 d4, d7, d3
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vand.i32 d4, d7, d3
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vand.i64 d4, d7, d3
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vand.s8 d4, d7, d3
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vand.s16 d4, d7, d3
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vand.s32 d4, d7, d3
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vand.s64 d4, d7, d3
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vand.u8 d4, d7, d3
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vand.u16 d4, d7, d3
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vand.u32 d4, d7, d3
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vand.u64 d4, d7, d3
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vand.p8 d4, d7, d3
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vand.p16 d4, d7, d3
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vand.f32 d4, d7, d3
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vand.f64 d4, d7, d3
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vand.f d4, d7, d3
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vand.d d4, d7, d3
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@ CHECK: vand d4, d7, d3 @ encoding: [0x13,0x41,0x07,0xf2]
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@ CHECK: vand d4, d7, d3 @ encoding: [0x13,0x41,0x07,0xf2]
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@ CHECK: vand d4, d7, d3 @ encoding: [0x13,0x41,0x07,0xf2]
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@ CHECK: vand d4, d7, d3 @ encoding: [0x13,0x41,0x07,0xf2]
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@ CHECK: vand d4, d7, d3 @ encoding: [0x13,0x41,0x07,0xf2]
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@ CHECK: vand d4, d7, d3 @ encoding: [0x13,0x41,0x07,0xf2]
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@ CHECK: vand d4, d7, d3 @ encoding: [0x13,0x41,0x07,0xf2]
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@ CHECK: vand d4, d7, d3 @ encoding: [0x13,0x41,0x07,0xf2]
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@ CHECK: vand d4, d7, d3 @ encoding: [0x13,0x41,0x07,0xf2]
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@ CHECK: vand d4, d7, d3 @ encoding: [0x13,0x41,0x07,0xf2]
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@ CHECK: vand d4, d7, d3 @ encoding: [0x13,0x41,0x07,0xf2]
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@ CHECK: vand d4, d7, d3 @ encoding: [0x13,0x41,0x07,0xf2]
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@ CHECK: vand d4, d7, d3 @ encoding: [0x13,0x41,0x07,0xf2]
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@ CHECK: vand d4, d7, d3 @ encoding: [0x13,0x41,0x07,0xf2]
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@ CHECK: vand d4, d7, d3 @ encoding: [0x13,0x41,0x07,0xf2]
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@ CHECK: vand d4, d7, d3 @ encoding: [0x13,0x41,0x07,0xf2]
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@ CHECK: vand d4, d7, d3 @ encoding: [0x13,0x41,0x07,0xf2]
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@ CHECK: vand d4, d7, d3 @ encoding: [0x13,0x41,0x07,0xf2]
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@ CHECK: vand d4, d7, d3 @ encoding: [0x13,0x41,0x07,0xf2]
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@ CHECK: vand d4, d7, d3 @ encoding: [0x13,0x41,0x07,0xf2]
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@ CHECK: vand d4, d7, d3 @ encoding: [0x13,0x41,0x07,0xf2]
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@ CHECK: vand d4, d7, d3 @ encoding: [0x13,0x41,0x07,0xf2]
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@ CHECK: vand d4, d7, d3 @ encoding: [0x13,0x41,0x07,0xf2]
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vorr d4, d7, d3
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vorr.8 d4, d7, d3
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vorr.16 d4, d7, d3
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vorr.32 d4, d7, d3
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vorr.64 d4, d7, d3
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vorr.i8 d4, d7, d3
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vorr.i16 d4, d7, d3
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vorr.i32 d4, d7, d3
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vorr.i64 d4, d7, d3
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vorr.s8 d4, d7, d3
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vorr.s16 d4, d7, d3
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vorr.s32 q4, q7, q3
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vorr.s64 q4, q7, q3
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vorr.u8 q4, q7, q3
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vorr.u16 q4, q7, q3
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vorr.u32 q4, q7, q3
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vorr.u64 q4, q7, q3
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vorr.p8 q4, q7, q3
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vorr.p16 q4, q7, q3
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vorr.f32 q4, q7, q3
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vorr.f64 q4, q7, q3
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vorr.f q4, q7, q3
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vorr.d q4, q7, q3
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@ CHECK: vorr d4, d7, d3 @ encoding: [0x13,0x41,0x27,0xf2]
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@ CHECK: vorr d4, d7, d3 @ encoding: [0x13,0x41,0x27,0xf2]
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@ CHECK: vorr d4, d7, d3 @ encoding: [0x13,0x41,0x27,0xf2]
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@ CHECK: vorr d4, d7, d3 @ encoding: [0x13,0x41,0x27,0xf2]
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@ CHECK: vorr d4, d7, d3 @ encoding: [0x13,0x41,0x27,0xf2]
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@ CHECK: vorr d4, d7, d3 @ encoding: [0x13,0x41,0x27,0xf2]
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@ CHECK: vorr d4, d7, d3 @ encoding: [0x13,0x41,0x27,0xf2]
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@ CHECK: vorr d4, d7, d3 @ encoding: [0x13,0x41,0x27,0xf2]
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@ CHECK: vorr d4, d7, d3 @ encoding: [0x13,0x41,0x27,0xf2]
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@ CHECK: vorr d4, d7, d3 @ encoding: [0x13,0x41,0x27,0xf2]
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@ CHECK: vorr d4, d7, d3 @ encoding: [0x13,0x41,0x27,0xf2]
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@ CHECK: vorr q4, q7, q3 @ encoding: [0x56,0x81,0x2e,0xf2]
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@ CHECK: vorr q4, q7, q3 @ encoding: [0x56,0x81,0x2e,0xf2]
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@ CHECK: vorr q4, q7, q3 @ encoding: [0x56,0x81,0x2e,0xf2]
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@ CHECK: vorr q4, q7, q3 @ encoding: [0x56,0x81,0x2e,0xf2]
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@ CHECK: vorr q4, q7, q3 @ encoding: [0x56,0x81,0x2e,0xf2]
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@ CHECK: vorr q4, q7, q3 @ encoding: [0x56,0x81,0x2e,0xf2]
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@ CHECK: vorr q4, q7, q3 @ encoding: [0x56,0x81,0x2e,0xf2]
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@ CHECK: vorr q4, q7, q3 @ encoding: [0x56,0x81,0x2e,0xf2]
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@ CHECK: vorr q4, q7, q3 @ encoding: [0x56,0x81,0x2e,0xf2]
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@ CHECK: vorr q4, q7, q3 @ encoding: [0x56,0x81,0x2e,0xf2]
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@ CHECK: vorr q4, q7, q3 @ encoding: [0x56,0x81,0x2e,0xf2]
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@ CHECK: vorr q4, q7, q3 @ encoding: [0x56,0x81,0x2e,0xf2]
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