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Fix 80 col violation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40515 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -37,8 +37,9 @@ public:
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/// addReg - Add a new virtual register operand...
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///
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const
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MachineInstrBuilder &addReg(unsigned RegNo, bool isDef = false, bool isImp = false,
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bool isKill = false, bool isDead = false) const {
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MachineInstrBuilder &addReg(unsigned RegNo, bool isDef = false,
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bool isImp = false, bool isKill = false,
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bool isDead = false) const {
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MI->addRegOperand(RegNo, isDef, isImp, isKill, isDead);
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return *this;
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}
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