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Rework some .ARM.attribute work for improved gcc compatibility.

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Unified EmitTextAttribute for both Asm and Obj emission (.cpu only)
Added necessary cortex-A8 related attrs for codegen compat tests.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124995 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jason W Kim 2011-02-07 00:49:53 +00:00
parent c6ee9181a5
commit f009a961ca
4 changed files with 119 additions and 30 deletions
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63
lib/Target/ARM/ARMAsmPrinter.cpp
View File

@ -66,6 +66,7 @@ namespace {
public: public:
virtual void MaybeSwitchVendor(StringRef Vendor) = 0; virtual void MaybeSwitchVendor(StringRef Vendor) = 0;
virtual void EmitAttribute(unsigned Attribute, unsigned Value) = 0; virtual void EmitAttribute(unsigned Attribute, unsigned Value) = 0;
virtual void EmitTextAttribute(unsigned Attribute, StringRef String) = 0;
virtual void Finish() = 0; virtual void Finish() = 0;
virtual ~AttributeEmitter() {} virtual ~AttributeEmitter() {}
}; };
@ -82,6 +83,14 @@ namespace {
Twine(Attribute) + ", " + Twine(Value)); Twine(Attribute) + ", " + Twine(Value));
} }
void EmitTextAttribute(unsigned Attribute, StringRef String) {
switch (Attribute) {
case ARMBuildAttrs::CPU_name:
Streamer.EmitRawText(StringRef("\t.cpu ") + String);
break;
default: assert(0 && "Unsupported Text attribute in ASM Mode"); break;
}
}
void Finish() { } void Finish() { }
}; };
@ -115,6 +124,12 @@ namespace {
Contents += Value; Contents += Value;
} }
void EmitTextAttribute(unsigned Attribute, StringRef String) {
Contents += Attribute;
Contents += String;
Contents += 0;
}
void Finish() { void Finish() {
const size_t ContentsSize = Contents.size(); const size_t ContentsSize = Contents.size();
@ -449,32 +464,53 @@ void ARMAsmPrinter::emitAttributes() {
AttrEmitter->MaybeSwitchVendor("aeabi"); AttrEmitter->MaybeSwitchVendor("aeabi");
std::string CPUString = Subtarget->getCPUString(); std::string CPUString = Subtarget->getCPUString();
if (OutStreamer.hasRawTextSupport()) {
if (CPUString != "generic") if (CPUString == "cortex-a8" ||
OutStreamer.EmitRawText(StringRef("\t.cpu ") + CPUString); Subtarget->isCortexA8()) {
} else { AttrEmitter->EmitTextAttribute(ARMBuildAttrs::CPU_name, "CORTEX-A8");
assert(CPUString == "generic" && "Unsupported .cpu attribute for ELF/.o"); AttrEmitter->EmitAttribute(ARMBuildAttrs::CPU_arch, ARMBuildAttrs::v7);
AttrEmitter->EmitAttribute(ARMBuildAttrs::CPU_arch_profile,
ARMBuildAttrs::ApplicationProfile);
AttrEmitter->EmitAttribute(ARMBuildAttrs::ARM_ISA_use,
ARMBuildAttrs::Allowed);
AttrEmitter->EmitAttribute(ARMBuildAttrs::THUMB_ISA_use,
ARMBuildAttrs::AllowThumb32);
// Fixme: figure out when this is emitted.
//AttrEmitter->EmitAttribute(ARMBuildAttrs::WMMX_arch,
// ARMBuildAttrs::AllowWMMXv1);
//
/// ADD additional Else-cases here!
} else if (CPUString == "generic") {
// FIXME: Why these defaults? // FIXME: Why these defaults?
AttrEmitter->EmitAttribute(ARMBuildAttrs::CPU_arch, ARMBuildAttrs::v4T); AttrEmitter->EmitAttribute(ARMBuildAttrs::CPU_arch, ARMBuildAttrs::v4T);
AttrEmitter->EmitAttribute(ARMBuildAttrs::ARM_ISA_use, 1); AttrEmitter->EmitAttribute(ARMBuildAttrs::ARM_ISA_use,
AttrEmitter->EmitAttribute(ARMBuildAttrs::THUMB_ISA_use, 1); ARMBuildAttrs::Allowed);
AttrEmitter->EmitAttribute(ARMBuildAttrs::THUMB_ISA_use,
ARMBuildAttrs::Allowed);
} }
// FIXME: Emit FPU type // FIXME: Emit FPU type
if (Subtarget->hasVFP2()) if (Subtarget->hasVFP2())
AttrEmitter->EmitAttribute(ARMBuildAttrs::VFP_arch, 2); AttrEmitter->EmitAttribute(ARMBuildAttrs::VFP_arch,
ARMBuildAttrs::AllowFPv2);
// Signal various FP modes. // Signal various FP modes.
if (!UnsafeFPMath) { if (!UnsafeFPMath) {
AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_FP_denormal, 1); AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_FP_denormal,
AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_FP_exceptions, 1); ARMBuildAttrs::Allowed);
AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_FP_exceptions,
ARMBuildAttrs::Allowed);
} }
if (NoInfsFPMath && NoNaNsFPMath) if (NoInfsFPMath && NoNaNsFPMath)
AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_FP_number_model, 1); AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_FP_number_model,
ARMBuildAttrs::Allowed);
else else
AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_FP_number_model, 3); AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_FP_number_model,
ARMBuildAttrs::AllowIEE754);
// FIXME: add more flags to ARMBuildAttrs.h
// 8-bytes alignment stuff. // 8-bytes alignment stuff.
AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_align8_needed, 1); AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_align8_needed, 1);
AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_align8_preserved, 1); AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_align8_preserved, 1);
@ -486,7 +522,8 @@ void ARMAsmPrinter::emitAttributes() {
} }
// FIXME: Should we signal R9 usage? // FIXME: Should we signal R9 usage?
AttrEmitter->EmitAttribute(ARMBuildAttrs::DIV_use, 1); if (Subtarget->hasDivide())
AttrEmitter->EmitAttribute(ARMBuildAttrs::DIV_use, 1);
AttrEmitter->Finish(); AttrEmitter->Finish();
delete AttrEmitter; delete AttrEmitter;

34
lib/Target/ARM/ARMBuildAttrs.h
View File

@ -92,6 +92,40 @@ namespace ARMBuildAttrs {
v7E_M = 13 // v7_M with DSP extensions v7E_M = 13 // v7_M with DSP extensions
}; };
enum CPUArchProfile { // (=7), uleb128
Not_Applicable = 0, // pre v7, or cross-profile code
ApplicationProfile = (0x41), // 'A' (e.g. for Cortex A8)
RealTimeProfile = (0x52), // 'R' (e.g. for Cortex R4)
MicroControllerProfile = (0x4D), // 'M' (e.g. for Cortex M3)
SystemProfile = (0x53) // 'S' Application or real-time profile
};
// The following have a lot of common use cases
enum {
//ARMISAUse (=8), uleb128 and THUMBISAUse (=9), uleb128
Not_Allowed = 0,
Allowed = 1,
// FP_arch (=10), uleb128 (formerly Tag_VFP_arch = 10)
AllowFPv2 = 2, // v2 FP ISA permitted (implies use of the v1 FP ISA)
AllowFPv3A = 3, // v3 FP ISA permitted (implies use of the v2 FP ISA)
AllowFPv3B = 4, // v3 FP ISA permitted, but only D0-D15, S0-S31
AllowFPv4A = 5, // v4 FP ISA permitted (implies use of v3 FP ISA)
AllowFPv4B = 6, // v4 FP ISA was permitted, but only D0-D15, S0-S31
// Tag_WMMX_arch, (=11), uleb128
AllowThumb32 = 2, // 32-bit Thumb (implies 16-bit instructions)
// Tag_WMMX_arch, (=11), uleb128
AllowWMMXv1 = 2, // The user permitted this entity to use WMMX v2
// Tag_ABI_FP_denormal, (=20), uleb128
PreserveFPSign = 2, // sign when flushed-to-zero is preserved
// Tag_ABI_FP_number_model, (=23), uleb128
AllowRTABI = 2, // numbers, infinities, and one quiet NaN (see [RTABI])
AllowIEE754 = 3 // this code to use all the IEEE 754-defined FP encodings
};
} }
#endif // __TARGET_ARMBUILDATTRS_H__ #endif // __TARGET_ARMBUILDATTRS_H__

10
test/CodeGen/ARM/2010-09-29-mc-asm-header-test.ll
View File

@ -2,11 +2,11 @@
; This tests that MC/asm header conversion is smooth ; This tests that MC/asm header conversion is smooth
; ;
; CHECK: .syntax unified ; CHECK: .syntax unified
; CHECK-NEXT: .eabi_attribute 20, 1 ; CHECK: .eabi_attribute 20, 1
; CHECK-NEXT: .eabi_attribute 21, 1 ; CHECK: .eabi_attribute 21, 1
; CHECK-NEXT: .eabi_attribute 23, 3 ; CHECK: .eabi_attribute 23, 3
; CHECK-NEXT: .eabi_attribute 24, 1 ; CHECK: .eabi_attribute 24, 1
; CHECK-NEXT: .eabi_attribute 25, 1 ; CHECK: .eabi_attribute 25, 1
define i32 @f(i64 %z) { define i32 @f(i64 %z) {
ret i32 0 ret i32 0

42
test/CodeGen/ARM/2010-10-19-mc-elf-objheader.ll
View File

@ -1,18 +1,36 @@
; RUN: llc %s -mtriple=arm-linux-gnueabi -filetype=obj -o - | \ ; RUN: llc %s -mtriple=arm-linux-gnueabi -filetype=obj -o - | \
; RUN: elf-dump --dump-section-data | FileCheck %s ; RUN: elf-dump --dump-section-data | FileCheck -check-prefix=BASIC %s
; RUN: llc %s -mtriple=armv7-linux-gnueabi -march=arm -mcpu=cortex-a8 \
; RUN: -mattr=-neon -mattr=+vfp2 \
; RUN: -arm-reserve-r9 -filetype=obj -o - | \
; RUN: elf-dump --dump-section-data | FileCheck -check-prefix=CORTEXA8 %s
; This tests that the extpected ARM attributes are emitted. ; This tests that the extpected ARM attributes are emitted.
; ;
; CHECK: .ARM.attributes ; BASIC: .ARM.attributes
; CHECK-NEXT: 0x70000003 ; BASIC-NEXT: 0x70000003
; CHECK-NEXT: 0x00000000 ; BASIC-NEXT: 0x00000000
; CHECK-NEXT: 0x00000000 ; BASIC-NEXT: 0x00000000
; CHECK-NEXT: 0x0000003c ; BASIC-NEXT: 0x0000003c
; CHECK-NEXT: 0x00000022 ; BASIC-NEXT: 0x00000020
; CHECK-NEXT: 0x00000000 ; BASIC-NEXT: 0x00000000
; CHECK-NEXT: 0x00000000 ; BASIC-NEXT: 0x00000000
; CHECK-NEXT: 0x00000001 ; BASIC-NEXT: 0x00000001
; CHECK-NEXT: 0x00000000 ; BASIC-NEXT: 0x00000000
; CHECK-NEXT: '41210000 00616561 62690001 17000000 06020801 09011401 15011703 18011901 2c01' ; BASIC-NEXT: '411f0000 00616561 62690001 15000000 06020801 09011401 15011703 18011901'
; CORTEXA8: .ARM.attributes
; CORTEXA8-NEXT: 0x70000003
; CORTEXA8-NEXT: 0x00000000
; CORTEXA8-NEXT: 0x00000000
; CORTEXA8-NEXT: 0x0000003c
; CORTEXA8-NEXT: 0x0000002f
; CORTEXA8-NEXT: 0x00000000
; CORTEXA8-NEXT: 0x00000000
; CORTEXA8-NEXT: 0x00000001
; CORTEXA8-NEXT: 0x00000000
; CORTEXA8-NEXT: '412e0000 00616561 62690001 24000000 05434f52 5445582d 41380006 0a074108 0109020a 02140115 01170318 011901'
define i32 @f(i64 %z) { define i32 @f(i64 %z) {
ret i32 0 ret i32 0