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[x86] Distinguish the 'o', 'v', 'X', and 'i' inline assembly memory constraints.
Summary: But still handle them the same way since I don't know how they differ on this target. Of these, 'o' and 'v' are not tested but were already implemented. I'm not sure why 'i' is required for X86 since it's supposed to be an immediate constraint rather than a memory constraint. A test asserts without it so I've included it for now. No functional change intended. Reviewers: nadav Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D8254 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237517 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -248,6 +248,7 @@ public:
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Constraint_R,
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Constraint_S,
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Constraint_T,
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Constraint_X,
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Constraint_Z,
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Constraint_ZC,
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Constraint_Zy,
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@ -2877,10 +2877,16 @@ SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID,
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std::vector<SDValue> &OutOps) {
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SDValue Op0, Op1, Op2, Op3, Op4;
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switch (ConstraintID) {
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default:
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llvm_unreachable("Unexpected asm memory constraint");
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case InlineAsm::Constraint_i:
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// FIXME: It seems strange that 'i' is needed here since it's supposed to
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// be an immediate and not a memory constraint.
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// Fallthrough.
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case InlineAsm::Constraint_o: // offsetable ??
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case InlineAsm::Constraint_v: // not offsetable ??
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default: return true;
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case InlineAsm::Constraint_m: // memory
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case InlineAsm::Constraint_X:
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if (!SelectAddr(nullptr, Op, Op0, Op1, Op2, Op3, Op4))
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return true;
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break;
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@ -704,8 +704,15 @@ namespace llvm {
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unsigned getInlineAsmMemConstraint(
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const std::string &ConstraintCode) const override {
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// FIXME: Map different constraints differently.
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return InlineAsm::Constraint_m;
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if (ConstraintCode == "i")
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return InlineAsm::Constraint_i;
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else if (ConstraintCode == "o")
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return InlineAsm::Constraint_o;
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else if (ConstraintCode == "v")
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return InlineAsm::Constraint_v;
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else if (ConstraintCode == "X")
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return InlineAsm::Constraint_X;
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return TargetLowering::getInlineAsmMemConstraint(ConstraintCode);
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}
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/// Given a physical register constraint
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