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[MCInstPrinter] Enable MCInstPrinter to change its behavior based on the

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per-function subtarget.

Currently, code-gen passes the default or generic subtarget to the constructors
of MCInstPrinter subclasses (see LLVMTargetMachine::addPassesToEmitFile), which
enables some targets (AArch64, ARM, and X86) to change their instprinter's
behavior based on the subtarget feature bits. Since the backend can now use
different subtargets for each function, instprinter has to be changed to use the
per-function subtarget rather than the default subtarget.

This patch takes the first step towards enabling instprinter to change its
behavior based on the per-function subtarget. It adds a bit "PassSubtarget" to
AsmWriter which tells table-gen to pass a reference to MCSubtargetInfo to the
various print methods table-gen auto-generates. 

I will follow up with changes to instprinters of AArch64, ARM, and X86.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233411 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Akira Hatanaka
2015-03-27 20:36:02 +00:00
parent 19e2fce680
commit f09378397e
39 changed files with 228 additions and 107 deletions
Download Patch File Download Diff File Expand all files Collapse all files
utils/TableGen/AsmWriterEmitter.cpp
+20 -7
View File
@@ -278,12 +278,15 @@ static void UnescapeString(std::string &Str) {
void AsmWriterEmitter::EmitPrintInstruction(raw_ostream &O) {
Record *AsmWriter = Target.getAsmWriter();
std::string ClassName = AsmWriter->getValueAsString("AsmWriterClassName");
unsigned PassSubtarget = AsmWriter->getValueAsInt("PassSubtarget");
O <<
"/// printInstruction - This method is automatically generated by tablegen\n"
"/// from the instruction set description.\n"
"void " << Target.getName() << ClassName
<< "::printInstruction(const MCInst *MI, raw_ostream &O) {\n";
<< "::printInstruction(const MCInst *MI, "
<< (PassSubtarget ? "const MCSubtargetInfo &STI, " : "")
<< "raw_ostream &O) {\n";
// Build an aggregate string, and build a table of offsets into it.
SequenceToOffsetTable<std::string> StringTable;
@@ -787,6 +790,7 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
// Emit the method that prints the alias instruction.
std::string ClassName = AsmWriter->getValueAsString("AsmWriterClassName");
unsigned Variant = AsmWriter->getValueAsInt("Variant");
unsigned PassSubtarget = AsmWriter->getValueAsInt("PassSubtarget");
std::vector<Record*> AllInstAliases =
Records.getAllDerivedDefinitions("InstAlias");
@@ -949,7 +953,8 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
HeaderO << "bool " << Target.getName() << ClassName
<< "::printAliasInstr(const MCInst"
<< " *MI, raw_ostream &OS) {\n";
<< " *MI, " << (PassSubtarget ? "const MCSubtargetInfo &STI, " : "")
<< "raw_ostream &OS) {\n";
std::string Cases;
raw_string_ostream CasesO(Cases);
@@ -1027,9 +1032,13 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
O << " ++I;\n";
O << " int OpIdx = AsmString[I++] - 1;\n";
O << " int PrintMethodIdx = AsmString[I++] - 1;\n";
O << " printCustomAliasOperand(MI, OpIdx, PrintMethodIdx, OS);\n";
O << " printCustomAliasOperand(MI, OpIdx, PrintMethodIdx, ";
O << (PassSubtarget ? "STI, " : "");
O << "OS);\n";
O << " } else\n";
O << " printOperand(MI, unsigned(AsmString[I++]) - 1, OS);\n";
O << " printOperand(MI, unsigned(AsmString[I++]) - 1, ";
O << (PassSubtarget ? "STI, " : "");
O << "OS);\n";
O << " } else {\n";
O << " OS << AsmString[I++];\n";
O << " }\n";
@@ -1046,7 +1055,9 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
O << "void " << Target.getName() << ClassName << "::"
<< "printCustomAliasOperand(\n"
<< " const MCInst *MI, unsigned OpIdx,\n"
<< " unsigned PrintMethodIdx, raw_ostream &OS) {\n";
<< " unsigned PrintMethodIdx,\n"
<< (PassSubtarget ? " const MCSubtargetInfo &STI,\n" : "")
<< " raw_ostream &OS) {\n";
if (PrintMethods.empty())
O << " llvm_unreachable(\"Unknown PrintMethod kind\");\n";
else {
@@ -1057,7 +1068,8 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
for (unsigned i = 0; i < PrintMethods.size(); ++i) {
O << " case " << i << ":\n"
<< " " << PrintMethods[i] << "(MI, OpIdx, OS);\n"
<< " " << PrintMethods[i] << "(MI, OpIdx, "
<< (PassSubtarget ? "STI, " : "") << "OS);\n"
<< " break;\n";
}
O << " }\n";
@@ -1094,7 +1106,8 @@ AsmWriterEmitter::AsmWriterEmitter(RecordKeeper &R) : Records(R), Target(R) {
for (const CodeGenInstruction *I : Target.instructions())
if (!I->AsmString.empty() && I->TheDef->getName() != "PHI")
Instructions.push_back(
AsmWriterInst(*I, AsmWriter->getValueAsInt("Variant")));
AsmWriterInst(*I, AsmWriter->getValueAsInt("Variant"),
AsmWriter->getValueAsInt("PassSubtarget")));
// Get the instruction numbering.
NumberedInstructions = &Target.getInstructionsByEnumValue();
utils/TableGen/AsmWriterInst.cpp
+8 -3
View File
@@ -39,6 +39,8 @@ std::string AsmWriterOperand::getCode() const {
std::string Result = Str + "(MI";
if (MIOpNo != ~0U)
Result += ", " + utostr(MIOpNo);
if (PassSubtarget)
Result += ", STI";
Result += ", O";
if (!MiModifier.empty())
Result += ", \"" + MiModifier + '"';
@@ -48,7 +50,8 @@ std::string AsmWriterOperand::getCode() const {
/// ParseAsmString - Parse the specified Instruction's AsmString into this
/// AsmWriterInst.
///
AsmWriterInst::AsmWriterInst(const CodeGenInstruction &CGI, unsigned Variant) {
AsmWriterInst::AsmWriterInst(const CodeGenInstruction &CGI, unsigned Variant,
unsigned PassSubtarget) {
this->CGI = &CGI;
// NOTE: Any extensions to this code need to be mirrored in the
@@ -163,7 +166,8 @@ AsmWriterInst::AsmWriterInst(const CodeGenInstruction &CGI, unsigned Variant) {
Operands.push_back(AsmWriterOperand("PrintSpecial",
~0U,
~0U,
Modifier));
Modifier,
PassSubtarget));
} else {
// Otherwise, normal operand.
unsigned OpNo = CGI.Operands.getOperandNamed(VarName);
@@ -171,7 +175,8 @@ AsmWriterInst::AsmWriterInst(const CodeGenInstruction &CGI, unsigned Variant) {
unsigned MIOp = OpInfo.MIOperandNo;
Operands.push_back(AsmWriterOperand(OpInfo.PrinterMethodName,
OpNo, MIOp, Modifier));
OpNo, MIOp, Modifier,
PassSubtarget));
}
LastEmitted = VarEnd;
}
utils/TableGen/AsmWriterInst.h
+8 -2
View File
@@ -53,6 +53,11 @@ namespace llvm {
/// an operand, specified with syntax like ${opname:modifier}.
std::string MiModifier;
// PassSubtarget - Pass MCSubtargetInfo to the print method if this is
// equal to 1.
// FIXME: Remove after all ports are updated.
unsigned PassSubtarget;
// To make VS STL happy
AsmWriterOperand(OpType op = isLiteralTextOperand):OperandType(op) {}
@@ -64,9 +69,10 @@ namespace llvm {
unsigned _CGIOpNo,
unsigned _MIOpNo,
const std::string &Modifier,
unsigned PassSubtarget,
OpType op = isMachineInstrOperand)
: OperandType(op), Str(Printer), CGIOpNo(_CGIOpNo), MIOpNo(_MIOpNo),
MiModifier(Modifier) {}
MiModifier(Modifier), PassSubtarget(PassSubtarget) {}
bool operator!=(const AsmWriterOperand &Other) const {
if (OperandType != Other.OperandType || Str != Other.Str) return true;
@@ -88,7 +94,7 @@ namespace llvm {
const CodeGenInstruction *CGI;
AsmWriterInst(const CodeGenInstruction &CGI,
unsigned Variant);
unsigned Variant, unsigned PassSubtarget);
/// MatchesAllButOneOp - If this instruction is exactly identical to the
/// specified instruction except for one differing operand, return the