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Ignore dbg_value's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99321 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -188,8 +188,9 @@ bool TwoAddressInstructionPass::Sink3AddrInstruction(MachineBasicBlock *MBB,
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// Find the instruction that kills SavedReg.
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MachineInstr *KillMI = NULL;
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for (MachineRegisterInfo::use_iterator UI = MRI->use_begin(SavedReg),
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UE = MRI->use_end(); UI != UE; ++UI) {
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for (MachineRegisterInfo::use_nodbg_iterator
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UI = MRI->use_nodbg_begin(SavedReg),
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UE = MRI->use_nodbg_end(); UI != UE; ++UI) {
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MachineOperand &UseMO = UI.getOperand();
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if (!UseMO.isKill())
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continue;
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@ -280,8 +281,8 @@ TwoAddressInstructionPass::isProfitableToReMat(unsigned Reg,
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MachineInstr *MI, MachineInstr *DefMI,
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MachineBasicBlock *MBB, unsigned Loc) {
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bool OtherUse = false;
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for (MachineRegisterInfo::use_iterator UI = MRI->use_begin(Reg),
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UE = MRI->use_end(); UI != UE; ++UI) {
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for (MachineRegisterInfo::use_nodbg_iterator UI = MRI->use_nodbg_begin(Reg),
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UE = MRI->use_nodbg_end(); UI != UE; ++UI) {
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MachineOperand &UseMO = UI.getOperand();
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MachineInstr *UseMI = UseMO.getParent();
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MachineBasicBlock *UseMBB = UseMI->getParent();
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@ -927,6 +928,7 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
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mi = nmi;
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continue;
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}
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const TargetInstrDesc &TID = mi->getDesc();
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bool FirstTied = true;
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@ -1101,7 +1103,7 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
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// Some remat'ed instructions are dead.
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int VReg = ReMatRegs.find_first();
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while (VReg != -1) {
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if (MRI->use_empty(VReg)) {
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if (MRI->use_nodbg_empty(VReg)) {
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MachineInstr *DefMI = MRI->getVRegDef(VReg);
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DefMI->eraseFromParent();
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}
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