mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-19 19:29:31 +00:00
Reduce size of routine. Shrinks .o by 37%.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29210 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Laskey
parent
65c7ea035c
commit
f19807cecb
@ -194,441 +194,509 @@ static MachineInstr *MakeRMIInst(unsigned Opcode, unsigned FrameIndex,
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}
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//===----------------------------------------------------------------------===//
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// Efficient Lookup Table Support
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//===----------------------------------------------------------------------===//
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namespace {
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struct TableEntry {
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unsigned from;
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unsigned to;
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unsigned make;
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bool operator<(const TableEntry &TE) const { return from < TE.from; }
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friend bool operator<(const TableEntry &TE, unsigned V) {
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return TE.from < V;
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}
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friend bool operator<(unsigned V, const TableEntry &TE) {
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return V < TE.from;
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}
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};
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}
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static bool TableIsSorted(const TableEntry *Table, unsigned NumEntries) {
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for (unsigned i = 0; i != NumEntries-1; ++i)
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if (!(Table[i] < Table[i+1])) return false;
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return true;
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}
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static int Lookup(const TableEntry *Table, unsigned N, unsigned Opcode,
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unsigned &make) {
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const TableEntry *I = std::lower_bound(Table, Table+N, Opcode);
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if (I != Table+N && I->from == Opcode) {
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make = I->make;
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return I->to;
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}
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return -1;
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}
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#define ARRAY_SIZE(TABLE) \
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(sizeof(TABLE)/sizeof(TABLE[0]))
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#ifdef NDEBUG
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#define ASSERT_SORTED(TABLE)
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#else
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#define ASSERT_SORTED(TABLE) \
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{ static bool TABLE##Checked = false; \
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if (!TABLE##Checked) \
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assert(TableIsSorted(TABLE, ARRAY_SIZE(TABLE)) && \
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"All lookup tables must be sorted for efficient access!"); \
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}
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#endif
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MachineInstr* X86RegisterInfo::foldMemoryOperand(MachineInstr* MI,
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unsigned i,
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int FrameIndex) const {
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// Check switch flag
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if (NoFusing) return NULL;
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/// FIXME: This should obviously be autogenerated by tablegen when patterns
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/// are available!
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if (i == 0) {
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switch(MI->getOpcode()) {
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case X86::XCHG8rr: return MakeMRInst(X86::XCHG8mr ,FrameIndex, MI);
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case X86::XCHG16rr: return MakeMRInst(X86::XCHG16mr,FrameIndex, MI);
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case X86::XCHG32rr: return MakeMRInst(X86::XCHG32mr,FrameIndex, MI);
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case X86::MOV8rr: return MakeMRInst(X86::MOV8mr , FrameIndex, MI);
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case X86::MOV16rr: return MakeMRInst(X86::MOV16mr, FrameIndex, MI);
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case X86::MOV32rr: return MakeMRInst(X86::MOV32mr, FrameIndex, MI);
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case X86::MOV8ri: return MakeMIInst(X86::MOV8mi , FrameIndex, MI);
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case X86::MOV16ri: return MakeMIInst(X86::MOV16mi, FrameIndex, MI);
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case X86::MOV32ri: return MakeMIInst(X86::MOV32mi, FrameIndex, MI);
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case X86::MUL8r: return MakeMInst( X86::MUL8m , FrameIndex, MI);
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case X86::MUL16r: return MakeMInst( X86::MUL16m, FrameIndex, MI);
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case X86::MUL32r: return MakeMInst( X86::MUL32m, FrameIndex, MI);
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case X86::IMUL8r: return MakeMInst( X86::IMUL8m , FrameIndex, MI);
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case X86::IMUL16r: return MakeMInst( X86::IMUL16m, FrameIndex, MI);
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case X86::IMUL32r: return MakeMInst( X86::IMUL32m, FrameIndex, MI);
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case X86::DIV8r: return MakeMInst( X86::DIV8m , FrameIndex, MI);
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case X86::DIV16r: return MakeMInst( X86::DIV16m, FrameIndex, MI);
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case X86::DIV32r: return MakeMInst( X86::DIV32m, FrameIndex, MI);
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case X86::IDIV8r: return MakeMInst( X86::IDIV8m , FrameIndex, MI);
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case X86::IDIV16r: return MakeMInst( X86::IDIV16m, FrameIndex, MI);
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case X86::IDIV32r: return MakeMInst( X86::IDIV32m, FrameIndex, MI);
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case X86::NEG8r: return MakeMInst( X86::NEG8m , FrameIndex, MI);
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case X86::NEG16r: return MakeMInst( X86::NEG16m, FrameIndex, MI);
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case X86::NEG32r: return MakeMInst( X86::NEG32m, FrameIndex, MI);
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case X86::NOT8r: return MakeMInst( X86::NOT8m , FrameIndex, MI);
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case X86::NOT16r: return MakeMInst( X86::NOT16m, FrameIndex, MI);
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case X86::NOT32r: return MakeMInst( X86::NOT32m, FrameIndex, MI);
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case X86::INC8r: return MakeMInst( X86::INC8m , FrameIndex, MI);
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case X86::INC16r: return MakeMInst( X86::INC16m, FrameIndex, MI);
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case X86::INC32r: return MakeMInst( X86::INC32m, FrameIndex, MI);
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case X86::DEC8r: return MakeMInst( X86::DEC8m , FrameIndex, MI);
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case X86::DEC16r: return MakeMInst( X86::DEC16m, FrameIndex, MI);
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case X86::DEC32r: return MakeMInst( X86::DEC32m, FrameIndex, MI);
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case X86::ADD8rr: return MakeMRInst(X86::ADD8mr , FrameIndex, MI);
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case X86::ADD16rr: return MakeMRInst(X86::ADD16mr, FrameIndex, MI);
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case X86::ADD32rr: return MakeMRInst(X86::ADD32mr, FrameIndex, MI);
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case X86::ADD8ri: return MakeMIInst(X86::ADD8mi , FrameIndex, MI);
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case X86::ADD16ri: return MakeMIInst(X86::ADD16mi, FrameIndex, MI);
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case X86::ADD32ri: return MakeMIInst(X86::ADD32mi, FrameIndex, MI);
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case X86::ADD16ri8: return MakeMIInst(X86::ADD16mi8,FrameIndex, MI);
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case X86::ADD32ri8: return MakeMIInst(X86::ADD32mi8,FrameIndex, MI);
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case X86::ADC32rr: return MakeMRInst(X86::ADC32mr, FrameIndex, MI);
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case X86::ADC32ri: return MakeMIInst(X86::ADC32mi, FrameIndex, MI);
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case X86::ADC32ri8: return MakeMIInst(X86::ADC32mi8,FrameIndex, MI);
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case X86::SUB8rr: return MakeMRInst(X86::SUB8mr , FrameIndex, MI);
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case X86::SUB16rr: return MakeMRInst(X86::SUB16mr, FrameIndex, MI);
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case X86::SUB32rr: return MakeMRInst(X86::SUB32mr, FrameIndex, MI);
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case X86::SUB8ri: return MakeMIInst(X86::SUB8mi , FrameIndex, MI);
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case X86::SUB16ri: return MakeMIInst(X86::SUB16mi, FrameIndex, MI);
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case X86::SUB32ri: return MakeMIInst(X86::SUB32mi, FrameIndex, MI);
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case X86::SUB16ri8: return MakeMIInst(X86::SUB16mi8,FrameIndex, MI);
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case X86::SUB32ri8: return MakeMIInst(X86::SUB32mi8,FrameIndex, MI);
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case X86::SBB32rr: return MakeMRInst(X86::SBB32mr, FrameIndex, MI);
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case X86::SBB32ri: return MakeMIInst(X86::SBB32mi, FrameIndex, MI);
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case X86::SBB32ri8: return MakeMIInst(X86::SBB32mi8,FrameIndex, MI);
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case X86::AND8rr: return MakeMRInst(X86::AND8mr , FrameIndex, MI);
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case X86::AND16rr: return MakeMRInst(X86::AND16mr, FrameIndex, MI);
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case X86::AND32rr: return MakeMRInst(X86::AND32mr, FrameIndex, MI);
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case X86::AND8ri: return MakeMIInst(X86::AND8mi , FrameIndex, MI);
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case X86::AND16ri: return MakeMIInst(X86::AND16mi, FrameIndex, MI);
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case X86::AND32ri: return MakeMIInst(X86::AND32mi, FrameIndex, MI);
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case X86::AND16ri8: return MakeMIInst(X86::AND16mi8,FrameIndex, MI);
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case X86::AND32ri8: return MakeMIInst(X86::AND32mi8,FrameIndex, MI);
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case X86::OR8rr: return MakeMRInst(X86::OR8mr , FrameIndex, MI);
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case X86::OR16rr: return MakeMRInst(X86::OR16mr, FrameIndex, MI);
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case X86::OR32rr: return MakeMRInst(X86::OR32mr, FrameIndex, MI);
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case X86::OR8ri: return MakeMIInst(X86::OR8mi , FrameIndex, MI);
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case X86::OR16ri: return MakeMIInst(X86::OR16mi, FrameIndex, MI);
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case X86::OR32ri: return MakeMIInst(X86::OR32mi, FrameIndex, MI);
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case X86::OR16ri8: return MakeMIInst(X86::OR16mi8, FrameIndex, MI);
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case X86::OR32ri8: return MakeMIInst(X86::OR32mi8, FrameIndex, MI);
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case X86::XOR8rr: return MakeMRInst(X86::XOR8mr , FrameIndex, MI);
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case X86::XOR16rr: return MakeMRInst(X86::XOR16mr, FrameIndex, MI);
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case X86::XOR32rr: return MakeMRInst(X86::XOR32mr, FrameIndex, MI);
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case X86::XOR8ri: return MakeMIInst(X86::XOR8mi , FrameIndex, MI);
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case X86::XOR16ri: return MakeMIInst(X86::XOR16mi, FrameIndex, MI);
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case X86::XOR32ri: return MakeMIInst(X86::XOR32mi, FrameIndex, MI);
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case X86::XOR16ri8: return MakeMIInst(X86::XOR16mi8,FrameIndex, MI);
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case X86::XOR32ri8: return MakeMIInst(X86::XOR32mi8,FrameIndex, MI);
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case X86::SHL8rCL: return MakeMInst( X86::SHL8mCL ,FrameIndex, MI);
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case X86::SHL16rCL: return MakeMInst( X86::SHL16mCL,FrameIndex, MI);
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case X86::SHL32rCL: return MakeMInst( X86::SHL32mCL,FrameIndex, MI);
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case X86::SHL8ri: return MakeMIInst(X86::SHL8mi , FrameIndex, MI);
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case X86::SHL16ri: return MakeMIInst(X86::SHL16mi, FrameIndex, MI);
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case X86::SHL32ri: return MakeMIInst(X86::SHL32mi, FrameIndex, MI);
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case X86::SHL8r1: return MakeMInst(X86::SHL8m1 , FrameIndex, MI);
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case X86::SHL16r1: return MakeMInst(X86::SHL16m1, FrameIndex, MI);
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case X86::SHL32r1: return MakeMInst(X86::SHL32m1, FrameIndex, MI);
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case X86::SHR8rCL: return MakeMInst( X86::SHR8mCL ,FrameIndex, MI);
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case X86::SHR16rCL: return MakeMInst( X86::SHR16mCL,FrameIndex, MI);
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case X86::SHR32rCL: return MakeMInst( X86::SHR32mCL,FrameIndex, MI);
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case X86::SHR8ri: return MakeMIInst(X86::SHR8mi , FrameIndex, MI);
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case X86::SHR16ri: return MakeMIInst(X86::SHR16mi, FrameIndex, MI);
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case X86::SHR32ri: return MakeMIInst(X86::SHR32mi, FrameIndex, MI);
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case X86::SHR8r1: return MakeMInst(X86::SHR8m1 , FrameIndex, MI);
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case X86::SHR16r1: return MakeMInst(X86::SHR16m1, FrameIndex, MI);
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case X86::SHR32r1: return MakeMInst(X86::SHR32m1, FrameIndex, MI);
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case X86::SAR8rCL: return MakeMInst( X86::SAR8mCL ,FrameIndex, MI);
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case X86::SAR16rCL: return MakeMInst( X86::SAR16mCL,FrameIndex, MI);
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case X86::SAR32rCL: return MakeMInst( X86::SAR32mCL,FrameIndex, MI);
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case X86::SAR8ri: return MakeMIInst(X86::SAR8mi , FrameIndex, MI);
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case X86::SAR16ri: return MakeMIInst(X86::SAR16mi, FrameIndex, MI);
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case X86::SAR32ri: return MakeMIInst(X86::SAR32mi, FrameIndex, MI);
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case X86::SAR8r1: return MakeMInst(X86::SAR8m1 , FrameIndex, MI);
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case X86::SAR16r1: return MakeMInst(X86::SAR16m1, FrameIndex, MI);
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case X86::SAR32r1: return MakeMInst(X86::SAR32m1, FrameIndex, MI);
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case X86::ROL8rCL: return MakeMInst( X86::ROL8mCL ,FrameIndex, MI);
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case X86::ROL16rCL: return MakeMInst( X86::ROL16mCL,FrameIndex, MI);
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case X86::ROL32rCL: return MakeMInst( X86::ROL32mCL,FrameIndex, MI);
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case X86::ROL8ri: return MakeMIInst(X86::ROL8mi , FrameIndex, MI);
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case X86::ROL16ri: return MakeMIInst(X86::ROL16mi, FrameIndex, MI);
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case X86::ROL32ri: return MakeMIInst(X86::ROL32mi, FrameIndex, MI);
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case X86::ROL8r1: return MakeMInst(X86::ROL8m1 , FrameIndex, MI);
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case X86::ROL16r1: return MakeMInst(X86::ROL16m1, FrameIndex, MI);
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case X86::ROL32r1: return MakeMInst(X86::ROL32m1, FrameIndex, MI);
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case X86::ROR8rCL: return MakeMInst( X86::ROR8mCL ,FrameIndex, MI);
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case X86::ROR16rCL: return MakeMInst( X86::ROR16mCL,FrameIndex, MI);
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case X86::ROR32rCL: return MakeMInst( X86::ROR32mCL,FrameIndex, MI);
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case X86::ROR8ri: return MakeMIInst(X86::ROR8mi , FrameIndex, MI);
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case X86::ROR16ri: return MakeMIInst(X86::ROR16mi, FrameIndex, MI);
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case X86::ROR32ri: return MakeMIInst(X86::ROR32mi, FrameIndex, MI);
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case X86::ROR8r1: return MakeMInst(X86::ROR8m1 , FrameIndex, MI);
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case X86::ROR16r1: return MakeMInst(X86::ROR16m1, FrameIndex, MI);
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case X86::ROR32r1: return MakeMInst(X86::ROR32m1, FrameIndex, MI);
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case X86::SHLD32rrCL:return MakeMRInst( X86::SHLD32mrCL,FrameIndex, MI);
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case X86::SHLD32rri8:return MakeMRIInst(X86::SHLD32mri8,FrameIndex, MI);
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case X86::SHRD32rrCL:return MakeMRInst( X86::SHRD32mrCL,FrameIndex, MI);
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case X86::SHRD32rri8:return MakeMRIInst(X86::SHRD32mri8,FrameIndex, MI);
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case X86::SHLD16rrCL:return MakeMRInst( X86::SHLD16mrCL,FrameIndex, MI);
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case X86::SHLD16rri8:return MakeMRIInst(X86::SHLD16mri8,FrameIndex, MI);
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case X86::SHRD16rrCL:return MakeMRInst( X86::SHRD16mrCL,FrameIndex, MI);
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case X86::SHRD16rri8:return MakeMRIInst(X86::SHRD16mri8,FrameIndex, MI);
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case X86::SETBr: return MakeMInst( X86::SETBm, FrameIndex, MI);
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case X86::SETAEr: return MakeMInst( X86::SETAEm, FrameIndex, MI);
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case X86::SETEr: return MakeMInst( X86::SETEm, FrameIndex, MI);
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case X86::SETNEr: return MakeMInst( X86::SETNEm, FrameIndex, MI);
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case X86::SETBEr: return MakeMInst( X86::SETBEm, FrameIndex, MI);
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case X86::SETAr: return MakeMInst( X86::SETAm, FrameIndex, MI);
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case X86::SETSr: return MakeMInst( X86::SETSm, FrameIndex, MI);
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case X86::SETNSr: return MakeMInst( X86::SETNSm, FrameIndex, MI);
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case X86::SETPr: return MakeMInst( X86::SETPm, FrameIndex, MI);
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case X86::SETNPr: return MakeMInst( X86::SETNPm, FrameIndex, MI);
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case X86::SETLr: return MakeMInst( X86::SETLm, FrameIndex, MI);
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case X86::SETGEr: return MakeMInst( X86::SETGEm, FrameIndex, MI);
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case X86::SETLEr: return MakeMInst( X86::SETLEm, FrameIndex, MI);
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case X86::SETGr: return MakeMInst( X86::SETGm, FrameIndex, MI);
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// Alias instructions
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case X86::MOV8r0: return MakeM0Inst(X86::MOV8mi, FrameIndex, MI);
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case X86::MOV16r0: return MakeM0Inst(X86::MOV16mi, FrameIndex, MI);
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case X86::MOV32r0: return MakeM0Inst(X86::MOV32mi, FrameIndex, MI);
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// Alias scalar SSE instructions
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case X86::FsMOVAPSrr: return MakeMRInst(X86::MOVSSmr, FrameIndex, MI);
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case X86::FsMOVAPDrr: return MakeMRInst(X86::MOVSDmr, FrameIndex, MI);
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// Scalar SSE instructions
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case X86::MOVSSrr: return MakeMRInst(X86::MOVSSmr, FrameIndex, MI);
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case X86::MOVSDrr: return MakeMRInst(X86::MOVSDmr, FrameIndex, MI);
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// Packed SSE instructions
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case X86::MOVAPSrr: return MakeMRInst(X86::MOVAPSmr, FrameIndex, MI);
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case X86::MOVAPDrr: return MakeMRInst(X86::MOVAPDmr, FrameIndex, MI);
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case X86::MOVUPSrr: return MakeMRInst(X86::MOVUPSmr, FrameIndex, MI);
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case X86::MOVUPDrr: return MakeMRInst(X86::MOVUPDmr, FrameIndex, MI);
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// Alias packed SSE instructions
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case X86::MOVPS2SSrr:return MakeMRInst(X86::MOVPS2SSmr, FrameIndex, MI);
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case X86::MOVPDI2DIrr:return MakeMRInst(X86::MOVPDI2DImr, FrameIndex, MI);
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}
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// Selection of instruction makes
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enum {
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makeM0Inst,
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makeMIInst,
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makeMInst,
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makeMRIInst,
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makeMRInst,
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makeRMIInst,
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makeRMInst
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};
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// Table (and size) to search
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const TableEntry *OpcodeTablePtr = NULL;
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unsigned OpcodeTableSize = 0;
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if (i == 0) { // If operand 0
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static const TableEntry OpcodeTable[] = {
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{ X86::ADC32ri, X86::ADC32mi, makeMIInst },
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{ X86::ADC32ri8, X86::ADC32mi8, makeMIInst },
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{ X86::ADC32rr, X86::ADC32mr, makeMRInst },
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{ X86::ADD16ri, X86::ADD16mi, makeMIInst },
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{ X86::ADD16ri8, X86::ADD16mi8, makeMIInst },
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{ X86::ADD16rr, X86::ADD16mr, makeMRInst },
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{ X86::ADD32ri, X86::ADD32mi, makeMIInst },
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{ X86::ADD32ri8, X86::ADD32mi8, makeMIInst },
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{ X86::ADD32rr, X86::ADD32mr, makeMRInst },
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{ X86::ADD8ri, X86::ADD8mi, makeMIInst },
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{ X86::ADD8rr, X86::ADD8mr, makeMRInst },
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{ X86::AND16ri, X86::AND16mi, makeMIInst },
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{ X86::AND16ri8, X86::AND16mi8, makeMIInst },
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{ X86::AND16rr, X86::AND16mr, makeMRInst },
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{ X86::AND32ri, X86::AND32mi, makeMIInst },
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{ X86::AND32ri8, X86::AND32mi8, makeMIInst },
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{ X86::AND32rr, X86::AND32mr, makeMRInst },
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{ X86::AND8ri, X86::AND8mi, makeMIInst },
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{ X86::AND8rr, X86::AND8mr, makeMRInst },
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{ X86::DEC16r, X86::DEC16m, makeMInst },
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{ X86::DEC32r, X86::DEC32m, makeMInst },
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{ X86::DEC8r, X86::DEC8m, makeMInst },
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{ X86::DIV16r, X86::DIV16m, makeMInst },
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{ X86::DIV32r, X86::DIV32m, makeMInst },
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{ X86::DIV8r, X86::DIV8m, makeMInst },
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{ X86::FsMOVAPDrr, X86::MOVSDmr, makeMRInst },
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{ X86::FsMOVAPSrr, X86::MOVSSmr, makeMRInst },
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{ X86::IDIV16r, X86::IDIV16m, makeMInst },
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{ X86::IDIV32r, X86::IDIV32m, makeMInst },
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{ X86::IDIV8r, X86::IDIV8m, makeMInst },
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{ X86::IMUL16r, X86::IMUL16m, makeMInst },
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{ X86::IMUL32r, X86::IMUL32m, makeMInst },
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{ X86::IMUL8r, X86::IMUL8m, makeMInst },
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{ X86::INC16r, X86::INC16m, makeMInst },
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{ X86::INC32r, X86::INC32m, makeMInst },
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{ X86::INC8r, X86::INC8m, makeMInst },
|
||||
{ X86::MOV16r0, X86::MOV16mi, makeM0Inst },
|
||||
{ X86::MOV16ri, X86::MOV16mi, makeMIInst },
|
||||
{ X86::MOV16rr, X86::MOV16mr, makeMRInst },
|
||||
{ X86::MOV32r0, X86::MOV32mi, makeM0Inst },
|
||||
{ X86::MOV32ri, X86::MOV32mi, makeMIInst },
|
||||
{ X86::MOV32rr, X86::MOV32mr, makeMRInst },
|
||||
{ X86::MOV8r0, X86::MOV8mi, makeM0Inst },
|
||||
{ X86::MOV8ri, X86::MOV8mi, makeMIInst },
|
||||
{ X86::MOV8rr, X86::MOV8mr, makeMRInst },
|
||||
{ X86::MOVAPDrr, X86::MOVAPDmr, makeMRInst },
|
||||
{ X86::MOVAPSrr, X86::MOVAPSmr, makeMRInst },
|
||||
{ X86::MOVPDI2DIrr, X86::MOVPDI2DImr, makeMRInst },
|
||||
{ X86::MOVPS2SSrr, X86::MOVPS2SSmr, makeMRInst },
|
||||
{ X86::MOVSDrr, X86::MOVSDmr, makeMRInst },
|
||||
{ X86::MOVSSrr, X86::MOVSSmr, makeMRInst },
|
||||
{ X86::MOVUPDrr, X86::MOVUPDmr, makeMRInst },
|
||||
{ X86::MOVUPSrr, X86::MOVUPSmr, makeMRInst },
|
||||
{ X86::MUL16r, X86::MUL16m, makeMInst },
|
||||
{ X86::MUL32r, X86::MUL32m, makeMInst },
|
||||
{ X86::MUL8r, X86::MUL8m, makeMInst },
|
||||
{ X86::NEG16r, X86::NEG16m, makeMInst },
|
||||
{ X86::NEG32r, X86::NEG32m, makeMInst },
|
||||
{ X86::NEG8r, X86::NEG8m, makeMInst },
|
||||
{ X86::NOT16r, X86::NOT16m, makeMInst },
|
||||
{ X86::NOT32r, X86::NOT32m, makeMInst },
|
||||
{ X86::NOT8r, X86::NOT8m, makeMInst },
|
||||
{ X86::OR16ri, X86::OR16mi, makeMIInst },
|
||||
{ X86::OR16ri8, X86::OR16mi8, makeMIInst },
|
||||
{ X86::OR16rr, X86::OR16mr, makeMRInst },
|
||||
{ X86::OR32ri, X86::OR32mi, makeMIInst },
|
||||
{ X86::OR32ri8, X86::OR32mi8, makeMIInst },
|
||||
{ X86::OR32rr, X86::OR32mr, makeMRInst },
|
||||
{ X86::OR8ri, X86::OR8mi, makeMIInst },
|
||||
{ X86::OR8rr, X86::OR8mr, makeMRInst },
|
||||
{ X86::ROL16r1, X86::ROL16m1, makeMInst },
|
||||
{ X86::ROL16rCL, X86::ROL16mCL, makeMInst },
|
||||
{ X86::ROL16ri, X86::ROL16mi, makeMIInst },
|
||||
{ X86::ROL32r1, X86::ROL32m1, makeMInst },
|
||||
{ X86::ROL32rCL, X86::ROL32mCL, makeMInst },
|
||||
{ X86::ROL32ri, X86::ROL32mi, makeMIInst },
|
||||
{ X86::ROL8r1, X86::ROL8m1, makeMInst },
|
||||
{ X86::ROL8rCL, X86::ROL8mCL, makeMInst },
|
||||
{ X86::ROL8ri, X86::ROL8mi, makeMIInst },
|
||||
{ X86::ROR16r1, X86::ROR16m1, makeMInst },
|
||||
{ X86::ROR16rCL, X86::ROR16mCL, makeMInst },
|
||||
{ X86::ROR16ri, X86::ROR16mi, makeMIInst },
|
||||
{ X86::ROR32r1, X86::ROR32m1, makeMInst },
|
||||
{ X86::ROR32rCL, X86::ROR32mCL, makeMInst },
|
||||
{ X86::ROR32ri, X86::ROR32mi, makeMIInst },
|
||||
{ X86::ROR8r1, X86::ROR8m1, makeMInst },
|
||||
{ X86::ROR8rCL, X86::ROR8mCL, makeMInst },
|
||||
{ X86::ROR8ri, X86::ROR8mi, makeMIInst },
|
||||
{ X86::SAR16r1, X86::SAR16m1, makeMInst },
|
||||
{ X86::SAR16rCL, X86::SAR16mCL, makeMInst },
|
||||
{ X86::SAR16ri, X86::SAR16mi, makeMIInst },
|
||||
{ X86::SAR32r1, X86::SAR32m1, makeMInst },
|
||||
{ X86::SAR32rCL, X86::SAR32mCL, makeMInst },
|
||||
{ X86::SAR32ri, X86::SAR32mi, makeMIInst },
|
||||
{ X86::SAR8r1, X86::SAR8m1, makeMInst },
|
||||
{ X86::SAR8rCL, X86::SAR8mCL, makeMInst },
|
||||
{ X86::SAR8ri, X86::SAR8mi, makeMIInst },
|
||||
{ X86::SBB32ri, X86::SBB32mi, makeMIInst },
|
||||
{ X86::SBB32ri8, X86::SBB32mi8, makeMIInst },
|
||||
{ X86::SBB32rr, X86::SBB32mr, makeMRInst },
|
||||
{ X86::SETAEr, X86::SETAEm, makeMInst },
|
||||
{ X86::SETAr, X86::SETAm, makeMInst },
|
||||
{ X86::SETBEr, X86::SETBEm, makeMInst },
|
||||
{ X86::SETBr, X86::SETBm, makeMInst },
|
||||
{ X86::SETEr, X86::SETEm, makeMInst },
|
||||
{ X86::SETGEr, X86::SETGEm, makeMInst },
|
||||
{ X86::SETGr, X86::SETGm, makeMInst },
|
||||
{ X86::SETLEr, X86::SETLEm, makeMInst },
|
||||
{ X86::SETLr, X86::SETLm, makeMInst },
|
||||
{ X86::SETNEr, X86::SETNEm, makeMInst },
|
||||
{ X86::SETNPr, X86::SETNPm, makeMInst },
|
||||
{ X86::SETNSr, X86::SETNSm, makeMInst },
|
||||
{ X86::SETPr, X86::SETPm, makeMInst },
|
||||
{ X86::SETSr, X86::SETSm, makeMInst },
|
||||
{ X86::SHL16r1, X86::SHL16m1, makeMInst },
|
||||
{ X86::SHL16rCL, X86::SHL16mCL, makeMInst },
|
||||
{ X86::SHL16ri, X86::SHL16mi, makeMIInst },
|
||||
{ X86::SHL32r1, X86::SHL32m1, makeMInst },
|
||||
{ X86::SHL32rCL, X86::SHL32mCL, makeMInst },
|
||||
{ X86::SHL32ri, X86::SHL32mi, makeMIInst },
|
||||
{ X86::SHL8r1, X86::SHL8m1, makeMInst },
|
||||
{ X86::SHL8rCL, X86::SHL8mCL, makeMInst },
|
||||
{ X86::SHL8ri, X86::SHL8mi, makeMIInst },
|
||||
{ X86::SHLD16rrCL, X86::SHLD16mrCL, makeMRInst },
|
||||
{ X86::SHLD16rri8, X86::SHLD16mri8, makeMRIInst },
|
||||
{ X86::SHLD32rrCL, X86::SHLD32mrCL, makeMRInst },
|
||||
{ X86::SHLD32rri8, X86::SHLD32mri8, makeMRIInst },
|
||||
{ X86::SHR16r1, X86::SHR16m1, makeMInst },
|
||||
{ X86::SHR16rCL, X86::SHR16mCL, makeMInst },
|
||||
{ X86::SHR16ri, X86::SHR16mi, makeMIInst },
|
||||
{ X86::SHR32r1, X86::SHR32m1, makeMInst },
|
||||
{ X86::SHR32rCL, X86::SHR32mCL, makeMInst },
|
||||
{ X86::SHR32ri, X86::SHR32mi, makeMIInst },
|
||||
{ X86::SHR8r1, X86::SHR8m1, makeMInst },
|
||||
{ X86::SHR8rCL, X86::SHR8mCL, makeMInst },
|
||||
{ X86::SHR8ri, X86::SHR8mi, makeMIInst },
|
||||
{ X86::SHRD16rrCL, X86::SHRD16mrCL, makeMRInst },
|
||||
{ X86::SHRD16rri8, X86::SHRD16mri8, makeMRIInst },
|
||||
{ X86::SHRD32rrCL, X86::SHRD32mrCL, makeMRInst },
|
||||
{ X86::SHRD32rri8, X86::SHRD32mri8, makeMRIInst },
|
||||
{ X86::SUB16ri, X86::SUB16mi, makeMIInst },
|
||||
{ X86::SUB16ri8, X86::SUB16mi8, makeMIInst },
|
||||
{ X86::SUB16rr, X86::SUB16mr, makeMRInst },
|
||||
{ X86::SUB32ri, X86::SUB32mi, makeMIInst },
|
||||
{ X86::SUB32ri8, X86::SUB32mi8, makeMIInst },
|
||||
{ X86::SUB32rr, X86::SUB32mr, makeMRInst },
|
||||
{ X86::SUB8ri, X86::SUB8mi, makeMIInst },
|
||||
{ X86::SUB8rr, X86::SUB8mr, makeMRInst },
|
||||
{ X86::XCHG16rr, X86::XCHG16mr, makeMRInst },
|
||||
{ X86::XCHG32rr, X86::XCHG32mr, makeMRInst },
|
||||
{ X86::XCHG8rr, X86::XCHG8mr, makeMRInst },
|
||||
{ X86::XOR16ri, X86::XOR16mi, makeMIInst },
|
||||
{ X86::XOR16ri8, X86::XOR16mi8, makeMIInst },
|
||||
{ X86::XOR16rr, X86::XOR16mr, makeMRInst },
|
||||
{ X86::XOR32ri, X86::XOR32mi, makeMIInst },
|
||||
{ X86::XOR32ri8, X86::XOR32mi8, makeMIInst },
|
||||
{ X86::XOR32rr, X86::XOR32mr, makeMRInst },
|
||||
{ X86::XOR8ri, X86::XOR8mi, makeMIInst },
|
||||
{ X86::XOR8rr, X86::XOR8mr, makeMRInst }
|
||||
};
|
||||
ASSERT_SORTED(OpcodeTable);
|
||||
OpcodeTablePtr = OpcodeTable;
|
||||
OpcodeTableSize = ARRAY_SIZE(OpcodeTable);
|
||||
} else if (i == 1) {
|
||||
switch(MI->getOpcode()) {
|
||||
case X86::XCHG8rr: return MakeRMInst(X86::XCHG8rm ,FrameIndex, MI);
|
||||
case X86::XCHG16rr: return MakeRMInst(X86::XCHG16rm,FrameIndex, MI);
|
||||
case X86::XCHG32rr: return MakeRMInst(X86::XCHG32rm,FrameIndex, MI);
|
||||
case X86::MOV8rr: return MakeRMInst(X86::MOV8rm , FrameIndex, MI);
|
||||
case X86::MOV16rr: return MakeRMInst(X86::MOV16rm, FrameIndex, MI);
|
||||
case X86::MOV32rr: return MakeRMInst(X86::MOV32rm, FrameIndex, MI);
|
||||
case X86::CMOVB16rr: return MakeRMInst(X86::CMOVB16rm , FrameIndex, MI);
|
||||
case X86::CMOVB32rr: return MakeRMInst(X86::CMOVB32rm , FrameIndex, MI);
|
||||
case X86::CMOVAE16rr: return MakeRMInst(X86::CMOVAE16rm , FrameIndex, MI);
|
||||
case X86::CMOVAE32rr: return MakeRMInst(X86::CMOVAE32rm , FrameIndex, MI);
|
||||
case X86::CMOVE16rr: return MakeRMInst(X86::CMOVE16rm , FrameIndex, MI);
|
||||
case X86::CMOVE32rr: return MakeRMInst(X86::CMOVE32rm , FrameIndex, MI);
|
||||
case X86::CMOVNE16rr:return MakeRMInst(X86::CMOVNE16rm, FrameIndex, MI);
|
||||
case X86::CMOVNE32rr:return MakeRMInst(X86::CMOVNE32rm, FrameIndex, MI);
|
||||
case X86::CMOVBE16rr:return MakeRMInst(X86::CMOVBE16rm, FrameIndex, MI);
|
||||
case X86::CMOVBE32rr:return MakeRMInst(X86::CMOVBE32rm, FrameIndex, MI);
|
||||
case X86::CMOVA16rr:return MakeRMInst(X86::CMOVA16rm, FrameIndex, MI);
|
||||
case X86::CMOVA32rr:return MakeRMInst(X86::CMOVA32rm, FrameIndex, MI);
|
||||
case X86::CMOVS16rr: return MakeRMInst(X86::CMOVS16rm , FrameIndex, MI);
|
||||
case X86::CMOVS32rr: return MakeRMInst(X86::CMOVS32rm , FrameIndex, MI);
|
||||
case X86::CMOVNS16rr: return MakeRMInst(X86::CMOVNS16rm , FrameIndex, MI);
|
||||
case X86::CMOVNS32rr: return MakeRMInst(X86::CMOVNS32rm , FrameIndex, MI);
|
||||
case X86::CMOVP16rr: return MakeRMInst(X86::CMOVP16rm , FrameIndex, MI);
|
||||
case X86::CMOVP32rr: return MakeRMInst(X86::CMOVP32rm , FrameIndex, MI);
|
||||
case X86::CMOVNP16rr: return MakeRMInst(X86::CMOVNP16rm , FrameIndex, MI);
|
||||
case X86::CMOVNP32rr: return MakeRMInst(X86::CMOVNP32rm , FrameIndex, MI);
|
||||
case X86::CMOVL16rr: return MakeRMInst(X86::CMOVL16rm , FrameIndex, MI);
|
||||
case X86::CMOVL32rr: return MakeRMInst(X86::CMOVL32rm , FrameIndex, MI);
|
||||
case X86::CMOVGE16rr: return MakeRMInst(X86::CMOVGE16rm , FrameIndex, MI);
|
||||
case X86::CMOVGE32rr: return MakeRMInst(X86::CMOVGE32rm , FrameIndex, MI);
|
||||
case X86::CMOVLE16rr: return MakeRMInst(X86::CMOVLE16rm , FrameIndex, MI);
|
||||
case X86::CMOVLE32rr: return MakeRMInst(X86::CMOVLE32rm , FrameIndex, MI);
|
||||
case X86::CMOVG16rr: return MakeRMInst(X86::CMOVG16rm , FrameIndex, MI);
|
||||
case X86::CMOVG32rr: return MakeRMInst(X86::CMOVG32rm , FrameIndex, MI);
|
||||
case X86::ADD8rr: return MakeRMInst(X86::ADD8rm , FrameIndex, MI);
|
||||
case X86::ADD16rr: return MakeRMInst(X86::ADD16rm, FrameIndex, MI);
|
||||
case X86::ADD32rr: return MakeRMInst(X86::ADD32rm, FrameIndex, MI);
|
||||
case X86::ADC32rr: return MakeRMInst(X86::ADC32rm, FrameIndex, MI);
|
||||
case X86::SUB8rr: return MakeRMInst(X86::SUB8rm , FrameIndex, MI);
|
||||
case X86::SUB16rr: return MakeRMInst(X86::SUB16rm, FrameIndex, MI);
|
||||
case X86::SUB32rr: return MakeRMInst(X86::SUB32rm, FrameIndex, MI);
|
||||
case X86::SBB32rr: return MakeRMInst(X86::SBB32rm, FrameIndex, MI);
|
||||
case X86::AND8rr: return MakeRMInst(X86::AND8rm , FrameIndex, MI);
|
||||
case X86::AND16rr: return MakeRMInst(X86::AND16rm, FrameIndex, MI);
|
||||
case X86::AND32rr: return MakeRMInst(X86::AND32rm, FrameIndex, MI);
|
||||
case X86::OR8rr: return MakeRMInst(X86::OR8rm , FrameIndex, MI);
|
||||
case X86::OR16rr: return MakeRMInst(X86::OR16rm, FrameIndex, MI);
|
||||
case X86::OR32rr: return MakeRMInst(X86::OR32rm, FrameIndex, MI);
|
||||
case X86::XOR8rr: return MakeRMInst(X86::XOR8rm , FrameIndex, MI);
|
||||
case X86::XOR16rr: return MakeRMInst(X86::XOR16rm, FrameIndex, MI);
|
||||
case X86::XOR32rr: return MakeRMInst(X86::XOR32rm, FrameIndex, MI);
|
||||
case X86::IMUL16rr: return MakeRMInst(X86::IMUL16rm,FrameIndex, MI);
|
||||
case X86::IMUL32rr: return MakeRMInst(X86::IMUL32rm,FrameIndex, MI);
|
||||
case X86::IMUL16rri: return MakeRMIInst(X86::IMUL16rmi, FrameIndex, MI);
|
||||
case X86::IMUL32rri: return MakeRMIInst(X86::IMUL32rmi, FrameIndex, MI);
|
||||
case X86::IMUL16rri8:return MakeRMIInst(X86::IMUL16rmi8, FrameIndex, MI);
|
||||
case X86::IMUL32rri8:return MakeRMIInst(X86::IMUL32rmi8, FrameIndex, MI);
|
||||
case X86::TEST8rr: return MakeRMInst(X86::TEST8rm ,FrameIndex, MI);
|
||||
case X86::TEST16rr: return MakeRMInst(X86::TEST16rm,FrameIndex, MI);
|
||||
case X86::TEST32rr: return MakeRMInst(X86::TEST32rm,FrameIndex, MI);
|
||||
case X86::TEST8ri: return MakeMIInst(X86::TEST8mi ,FrameIndex, MI);
|
||||
case X86::TEST16ri: return MakeMIInst(X86::TEST16mi,FrameIndex, MI);
|
||||
case X86::TEST32ri: return MakeMIInst(X86::TEST32mi,FrameIndex, MI);
|
||||
case X86::CMP8rr: return MakeRMInst(X86::CMP8rm , FrameIndex, MI);
|
||||
case X86::CMP16rr: return MakeRMInst(X86::CMP16rm, FrameIndex, MI);
|
||||
case X86::CMP32rr: return MakeRMInst(X86::CMP32rm, FrameIndex, MI);
|
||||
case X86::CMP8ri: return MakeRMInst(X86::CMP8mi , FrameIndex, MI);
|
||||
case X86::CMP16ri: return MakeMIInst(X86::CMP16mi, FrameIndex, MI);
|
||||
case X86::CMP32ri: return MakeMIInst(X86::CMP32mi, FrameIndex, MI);
|
||||
case X86::CMP16ri8: return MakeMIInst(X86::CMP16mi8, FrameIndex, MI);
|
||||
case X86::CMP32ri8: return MakeRMInst(X86::CMP32mi8, FrameIndex, MI);
|
||||
case X86::MOVSX16rr8:return MakeRMInst(X86::MOVSX16rm8 , FrameIndex, MI);
|
||||
case X86::MOVSX32rr8:return MakeRMInst(X86::MOVSX32rm8, FrameIndex, MI);
|
||||
case X86::MOVSX32rr16:return MakeRMInst(X86::MOVSX32rm16, FrameIndex, MI);
|
||||
case X86::MOVZX16rr8:return MakeRMInst(X86::MOVZX16rm8 , FrameIndex, MI);
|
||||
case X86::MOVZX32rr8:return MakeRMInst(X86::MOVZX32rm8, FrameIndex, MI);
|
||||
case X86::MOVZX32rr16:return MakeRMInst(X86::MOVZX32rm16, FrameIndex, MI);
|
||||
// Alias scalar SSE instructions
|
||||
case X86::FsMOVAPSrr:return MakeRMInst(X86::MOVSSrm, FrameIndex, MI);
|
||||
case X86::FsMOVAPDrr:return MakeRMInst(X86::MOVSDrm, FrameIndex, MI);
|
||||
// Scalar SSE instructions
|
||||
case X86::MOVSSrr: return MakeRMInst(X86::MOVSSrm, FrameIndex, MI);
|
||||
case X86::MOVSDrr: return MakeRMInst(X86::MOVSDrm, FrameIndex, MI);
|
||||
case X86::Int_CVTSS2SIrr:
|
||||
return MakeRMInst(X86::Int_CVTSS2SIrm, FrameIndex, MI);
|
||||
case X86::CVTTSS2SIrr:return MakeRMInst(X86::CVTTSS2SIrm, FrameIndex, MI);
|
||||
case X86::Int_CVTSD2SIrr:
|
||||
return MakeRMInst(X86::Int_CVTSD2SIrm, FrameIndex, MI);
|
||||
case X86::CVTTSD2SIrr:return MakeRMInst(X86::CVTTSD2SIrm, FrameIndex, MI);
|
||||
case X86::CVTSS2SDrr:return MakeRMInst(X86::CVTSS2SDrm, FrameIndex, MI);
|
||||
case X86::CVTSD2SSrr:return MakeRMInst(X86::CVTSD2SSrm, FrameIndex, MI);
|
||||
case X86::CVTSI2SSrr:return MakeRMInst(X86::CVTSI2SSrm, FrameIndex, MI);
|
||||
case X86::CVTSI2SDrr:return MakeRMInst(X86::CVTSI2SDrm, FrameIndex, MI);
|
||||
case X86::Int_CVTTSS2SIrr:
|
||||
return MakeRMInst(X86::Int_CVTTSS2SIrm, FrameIndex, MI);
|
||||
case X86::Int_CVTTSD2SIrr:
|
||||
return MakeRMInst(X86::Int_CVTTSD2SIrm, FrameIndex, MI);
|
||||
case X86::Int_CVTSI2SSrr:
|
||||
return MakeRMInst(X86::Int_CVTSI2SSrm, FrameIndex, MI);
|
||||
case X86::SQRTSSr: return MakeRMInst(X86::SQRTSSm, FrameIndex, MI);
|
||||
case X86::SQRTSDr: return MakeRMInst(X86::SQRTSDm, FrameIndex, MI);
|
||||
case X86::ADDSSrr: return MakeRMInst(X86::ADDSSrm, FrameIndex, MI);
|
||||
case X86::ADDSDrr: return MakeRMInst(X86::ADDSDrm, FrameIndex, MI);
|
||||
case X86::MULSSrr: return MakeRMInst(X86::MULSSrm, FrameIndex, MI);
|
||||
case X86::MULSDrr: return MakeRMInst(X86::MULSDrm, FrameIndex, MI);
|
||||
case X86::DIVSSrr: return MakeRMInst(X86::DIVSSrm, FrameIndex, MI);
|
||||
case X86::DIVSDrr: return MakeRMInst(X86::DIVSDrm, FrameIndex, MI);
|
||||
case X86::SUBSSrr: return MakeRMInst(X86::SUBSSrm, FrameIndex, MI);
|
||||
case X86::SUBSDrr: return MakeRMInst(X86::SUBSDrm, FrameIndex, MI);
|
||||
case X86::CMPSSrr: return MakeRMInst(X86::CMPSSrm, FrameIndex, MI);
|
||||
case X86::CMPSDrr: return MakeRMInst(X86::CMPSDrm, FrameIndex, MI);
|
||||
case X86::Int_CMPSSrr: return MakeRMInst(X86::Int_CMPSSrm, FrameIndex, MI);
|
||||
case X86::Int_CMPSDrr: return MakeRMInst(X86::Int_CMPSDrm, FrameIndex, MI);
|
||||
case X86::UCOMISSrr: return MakeRMInst(X86::UCOMISSrm, FrameIndex, MI);
|
||||
case X86::UCOMISDrr: return MakeRMInst(X86::UCOMISDrm, FrameIndex, MI);
|
||||
case X86::Int_UCOMISSrr:
|
||||
return MakeRMInst(X86::Int_UCOMISSrm, FrameIndex, MI);
|
||||
case X86::Int_UCOMISDrr:
|
||||
return MakeRMInst(X86::Int_UCOMISDrm, FrameIndex, MI);
|
||||
case X86::Int_COMISSrr:
|
||||
return MakeRMInst(X86::Int_COMISSrm, FrameIndex, MI);
|
||||
case X86::Int_COMISDrr:
|
||||
return MakeRMInst(X86::Int_COMISDrm, FrameIndex, MI);
|
||||
// Packed SSE instructions
|
||||
case X86::MOVAPSrr: return MakeRMInst(X86::MOVAPSrm, FrameIndex, MI);
|
||||
case X86::MOVAPDrr: return MakeRMInst(X86::MOVAPDrm, FrameIndex, MI);
|
||||
case X86::MOVUPSrr: return MakeRMInst(X86::MOVUPSrm, FrameIndex, MI);
|
||||
case X86::MOVUPDrr: return MakeRMInst(X86::MOVUPDrm, FrameIndex, MI);
|
||||
case X86::MOVSHDUPrr:return MakeRMInst(X86::MOVSHDUPrm, FrameIndex, MI);
|
||||
case X86::MOVSLDUPrr:return MakeRMInst(X86::MOVSLDUPrm, FrameIndex, MI);
|
||||
case X86::MOVDDUPrr: return MakeRMInst(X86::MOVDDUPrm, FrameIndex, MI);
|
||||
case X86::Int_CVTDQ2PSrr:
|
||||
return MakeRMInst(X86::Int_CVTDQ2PSrm, FrameIndex, MI);
|
||||
case X86::Int_CVTDQ2PDrr:
|
||||
return MakeRMInst(X86::Int_CVTDQ2PDrm, FrameIndex, MI);
|
||||
case X86::Int_CVTPS2DQrr:
|
||||
return MakeRMInst(X86::Int_CVTPS2DQrm, FrameIndex, MI);
|
||||
case X86::Int_CVTTPS2DQrr:
|
||||
return MakeRMInst(X86::Int_CVTTPS2DQrm, FrameIndex, MI);
|
||||
case X86::Int_CVTPD2DQrr:
|
||||
return MakeRMInst(X86::Int_CVTPD2DQrm, FrameIndex, MI);
|
||||
case X86::Int_CVTTPD2DQrr:
|
||||
return MakeRMInst(X86::Int_CVTTPD2DQrm, FrameIndex, MI);
|
||||
case X86::Int_CVTPS2PDrr:
|
||||
return MakeRMInst(X86::Int_CVTPS2PDrm, FrameIndex, MI);
|
||||
case X86::Int_CVTPD2PSrr:
|
||||
return MakeRMInst(X86::Int_CVTPD2PSrm, FrameIndex, MI);
|
||||
case X86::Int_CVTSI2SDrr:
|
||||
return MakeRMInst(X86::Int_CVTSI2SDrm, FrameIndex, MI);
|
||||
case X86::Int_CVTSD2SSrr:
|
||||
return MakeRMInst(X86::Int_CVTSD2SSrm, FrameIndex, MI);
|
||||
case X86::Int_CVTSS2SDrr:
|
||||
return MakeRMInst(X86::Int_CVTSS2SDrm, FrameIndex, MI);
|
||||
case X86::ADDPSrr: return MakeRMInst(X86::ADDPSrm, FrameIndex, MI);
|
||||
case X86::ADDPDrr: return MakeRMInst(X86::ADDPDrm, FrameIndex, MI);
|
||||
case X86::SUBPSrr: return MakeRMInst(X86::SUBPSrm, FrameIndex, MI);
|
||||
case X86::SUBPDrr: return MakeRMInst(X86::SUBPDrm, FrameIndex, MI);
|
||||
case X86::MULPSrr: return MakeRMInst(X86::MULPSrm, FrameIndex, MI);
|
||||
case X86::MULPDrr: return MakeRMInst(X86::MULPDrm, FrameIndex, MI);
|
||||
case X86::DIVPSrr: return MakeRMInst(X86::DIVPSrm, FrameIndex, MI);
|
||||
case X86::DIVPDrr: return MakeRMInst(X86::DIVPDrm, FrameIndex, MI);
|
||||
case X86::ADDSUBPSrr:return MakeRMInst(X86::ADDSUBPSrm, FrameIndex, MI);
|
||||
case X86::ADDSUBPDrr:return MakeRMInst(X86::ADDSUBPDrm, FrameIndex, MI);
|
||||
case X86::HADDPSrr: return MakeRMInst(X86::HADDPSrm, FrameIndex, MI);
|
||||
case X86::HADDPDrr: return MakeRMInst(X86::HADDPDrm, FrameIndex, MI);
|
||||
case X86::HSUBPSrr: return MakeRMInst(X86::HSUBPSrm, FrameIndex, MI);
|
||||
case X86::HSUBPDrr: return MakeRMInst(X86::HSUBPDrm, FrameIndex, MI);
|
||||
case X86::SQRTPSr: return MakeRMInst(X86::SQRTPSm, FrameIndex, MI);
|
||||
case X86::SQRTPDr: return MakeRMInst(X86::SQRTPDm, FrameIndex, MI);
|
||||
case X86::RSQRTPSr: return MakeRMInst(X86::RSQRTPSm, FrameIndex, MI);
|
||||
case X86::RCPPSr: return MakeRMInst(X86::RCPPSm, FrameIndex, MI);
|
||||
case X86::MAXPSrr: return MakeRMInst(X86::MAXPSrm, FrameIndex, MI);
|
||||
case X86::MAXPDrr: return MakeRMInst(X86::MAXPDrm, FrameIndex, MI);
|
||||
case X86::MINPSrr: return MakeRMInst(X86::MINPSrm, FrameIndex, MI);
|
||||
case X86::MINPDrr: return MakeRMInst(X86::MINPDrm, FrameIndex, MI);
|
||||
case X86::ANDPSrr: return MakeRMInst(X86::ANDPSrm, FrameIndex, MI);
|
||||
case X86::ANDPDrr: return MakeRMInst(X86::ANDPDrm, FrameIndex, MI);
|
||||
case X86::ORPSrr: return MakeRMInst(X86::ORPSrm, FrameIndex, MI);
|
||||
case X86::ORPDrr: return MakeRMInst(X86::ORPDrm, FrameIndex, MI);
|
||||
case X86::XORPSrr: return MakeRMInst(X86::XORPSrm, FrameIndex, MI);
|
||||
case X86::XORPDrr: return MakeRMInst(X86::XORPDrm, FrameIndex, MI);
|
||||
case X86::ANDNPSrr: return MakeRMInst(X86::ANDNPSrm, FrameIndex, MI);
|
||||
case X86::ANDNPDrr: return MakeRMInst(X86::ANDNPDrm, FrameIndex, MI);
|
||||
case X86::CMPPSrri: return MakeRMIInst(X86::CMPPSrmi, FrameIndex, MI);
|
||||
case X86::CMPPDrri: return MakeRMIInst(X86::CMPPDrmi, FrameIndex, MI);
|
||||
case X86::SHUFPSrri: return MakeRMIInst(X86::SHUFPSrmi, FrameIndex, MI);
|
||||
case X86::SHUFPDrri: return MakeRMIInst(X86::SHUFPDrmi, FrameIndex, MI);
|
||||
case X86::UNPCKHPSrr:return MakeRMInst(X86::UNPCKHPSrm, FrameIndex, MI);
|
||||
case X86::UNPCKHPDrr:return MakeRMInst(X86::UNPCKHPDrm, FrameIndex, MI);
|
||||
case X86::UNPCKLPSrr:return MakeRMInst(X86::UNPCKLPSrm, FrameIndex, MI);
|
||||
case X86::UNPCKLPDrr:return MakeRMInst(X86::UNPCKLPDrm, FrameIndex, MI);
|
||||
case X86::PADDBrr: return MakeRMInst(X86::PADDBrm, FrameIndex, MI);
|
||||
case X86::PADDWrr: return MakeRMInst(X86::PADDWrm, FrameIndex, MI);
|
||||
case X86::PADDDrr: return MakeRMInst(X86::PADDDrm, FrameIndex, MI);
|
||||
case X86::PADDSBrr: return MakeRMInst(X86::PADDSBrm, FrameIndex, MI);
|
||||
case X86::PADDSWrr: return MakeRMInst(X86::PADDSWrm, FrameIndex, MI);
|
||||
case X86::PSUBBrr: return MakeRMInst(X86::PSUBBrm, FrameIndex, MI);
|
||||
case X86::PSUBWrr: return MakeRMInst(X86::PSUBWrm, FrameIndex, MI);
|
||||
case X86::PSUBDrr: return MakeRMInst(X86::PSUBDrm, FrameIndex, MI);
|
||||
case X86::PSUBSBrr: return MakeRMInst(X86::PSUBSBrm, FrameIndex, MI);
|
||||
case X86::PSUBSWrr: return MakeRMInst(X86::PSUBSWrm, FrameIndex, MI);
|
||||
case X86::PMULHUWrr: return MakeRMInst(X86::PMULHUWrm, FrameIndex, MI);
|
||||
case X86::PMULHWrr: return MakeRMInst(X86::PMULHWrm, FrameIndex, MI);
|
||||
case X86::PMULLWrr: return MakeRMInst(X86::PMULLWrm, FrameIndex, MI);
|
||||
case X86::PMULUDQrr: return MakeRMInst(X86::PMULUDQrm, FrameIndex, MI);
|
||||
case X86::PMADDWDrr: return MakeRMInst(X86::PMADDWDrm, FrameIndex, MI);
|
||||
case X86::PAVGBrr: return MakeRMInst(X86::PAVGBrm, FrameIndex, MI);
|
||||
case X86::PAVGWrr: return MakeRMInst(X86::PAVGWrm, FrameIndex, MI);
|
||||
case X86::PMAXUBrr: return MakeRMInst(X86::PMAXUBrm, FrameIndex, MI);
|
||||
case X86::PMAXSWrr: return MakeRMInst(X86::PMAXSWrm, FrameIndex, MI);
|
||||
case X86::PMINUBrr: return MakeRMInst(X86::PMINUBrm, FrameIndex, MI);
|
||||
case X86::PMINSWrr: return MakeRMInst(X86::PMINSWrm, FrameIndex, MI);
|
||||
case X86::PSADBWrr: return MakeRMInst(X86::PSADBWrm, FrameIndex, MI);
|
||||
case X86::PSLLWrr: return MakeRMInst(X86::PSLLWrm, FrameIndex, MI);
|
||||
case X86::PSLLDrr: return MakeRMInst(X86::PSLLDrm, FrameIndex, MI);
|
||||
case X86::PSLLQrr: return MakeRMInst(X86::PSLLQrm, FrameIndex, MI);
|
||||
case X86::PSRLWrr: return MakeRMInst(X86::PSRLWrm, FrameIndex, MI);
|
||||
case X86::PSRLDrr: return MakeRMInst(X86::PSRLDrm, FrameIndex, MI);
|
||||
case X86::PSRLQrr: return MakeRMInst(X86::PSRLQrm, FrameIndex, MI);
|
||||
case X86::PSRAWrr: return MakeRMInst(X86::PSRAWrm, FrameIndex, MI);
|
||||
case X86::PSRADrr: return MakeRMInst(X86::PSRADrm, FrameIndex, MI);
|
||||
case X86::PANDrr: return MakeRMInst(X86::PANDrm, FrameIndex, MI);
|
||||
case X86::PORrr: return MakeRMInst(X86::PORrm, FrameIndex, MI);
|
||||
case X86::PXORrr: return MakeRMInst(X86::PXORrm, FrameIndex, MI);
|
||||
case X86::PANDNrr: return MakeRMInst(X86::PANDNrm, FrameIndex, MI);
|
||||
case X86::PCMPEQBrr: return MakeRMInst(X86::PCMPEQBrm, FrameIndex, MI);
|
||||
case X86::PCMPEQWrr: return MakeRMInst(X86::PCMPEQWrm, FrameIndex, MI);
|
||||
case X86::PCMPEQDrr: return MakeRMInst(X86::PCMPEQDrm, FrameIndex, MI);
|
||||
case X86::PCMPGTBrr: return MakeRMInst(X86::PCMPGTBrm, FrameIndex, MI);
|
||||
case X86::PCMPGTWrr: return MakeRMInst(X86::PCMPGTWrm, FrameIndex, MI);
|
||||
case X86::PCMPGTDrr: return MakeRMInst(X86::PCMPGTDrm, FrameIndex, MI);
|
||||
case X86::PACKSSWBrr:return MakeRMInst(X86::PACKSSWBrm, FrameIndex, MI);
|
||||
case X86::PACKSSDWrr:return MakeRMInst(X86::PACKSSDWrm, FrameIndex, MI);
|
||||
case X86::PACKUSWBrr:return MakeRMInst(X86::PACKUSWBrm, FrameIndex, MI);
|
||||
case X86::PSHUFDri: return MakeRMIInst(X86::PSHUFDmi, FrameIndex, MI);
|
||||
case X86::PSHUFHWri: return MakeRMIInst(X86::PSHUFHWmi, FrameIndex, MI);
|
||||
case X86::PSHUFLWri: return MakeRMIInst(X86::PSHUFLWmi, FrameIndex, MI);
|
||||
case X86::PUNPCKLBWrr:return MakeRMInst(X86::PUNPCKLBWrm, FrameIndex, MI);
|
||||
case X86::PUNPCKLWDrr:return MakeRMInst(X86::PUNPCKLWDrm, FrameIndex, MI);
|
||||
case X86::PUNPCKLDQrr:return MakeRMInst(X86::PUNPCKLDQrm, FrameIndex, MI);
|
||||
case X86::PUNPCKLQDQrr:return MakeRMInst(X86::PUNPCKLQDQrm, FrameIndex, MI);
|
||||
case X86::PUNPCKHBWrr:return MakeRMInst(X86::PUNPCKHBWrm, FrameIndex, MI);
|
||||
case X86::PUNPCKHWDrr:return MakeRMInst(X86::PUNPCKHWDrm, FrameIndex, MI);
|
||||
case X86::PUNPCKHDQrr:return MakeRMInst(X86::PUNPCKHDQrm, FrameIndex, MI);
|
||||
case X86::PUNPCKHQDQrr:return MakeRMInst(X86::PUNPCKHQDQrm, FrameIndex, MI);
|
||||
case X86::PINSRWrri: return MakeRMIInst(X86::PINSRWrmi, FrameIndex, MI);
|
||||
// Alias packed SSE instructions
|
||||
case X86::MOVSS2PSrr:return MakeRMInst(X86::MOVSS2PSrm, FrameIndex, MI);
|
||||
case X86::MOVSD2PDrr:return MakeRMInst(X86::MOVSD2PDrm, FrameIndex, MI);
|
||||
case X86::MOVDI2PDIrr:return MakeRMInst(X86::MOVDI2PDIrm, FrameIndex, MI);
|
||||
case X86::MOVQI2PQIrr:return MakeRMInst(X86::MOVQI2PQIrm, FrameIndex, MI);
|
||||
static const TableEntry OpcodeTable[] = {
|
||||
{ X86::ADC32rr, X86::ADC32rm, makeRMInst },
|
||||
{ X86::ADD16rr, X86::ADD16rm, makeRMInst },
|
||||
{ X86::ADD32rr, X86::ADD32rm, makeRMInst },
|
||||
{ X86::ADD8rr, X86::ADD8rm, makeRMInst },
|
||||
{ X86::ADDPDrr, X86::ADDPDrm, makeRMInst },
|
||||
{ X86::ADDPSrr, X86::ADDPSrm, makeRMInst },
|
||||
{ X86::ADDSDrr, X86::ADDSDrm, makeRMInst },
|
||||
{ X86::ADDSSrr, X86::ADDSSrm, makeRMInst },
|
||||
{ X86::ADDSUBPDrr, X86::ADDSUBPDrm, makeRMInst },
|
||||
{ X86::ADDSUBPSrr, X86::ADDSUBPSrm, makeRMInst },
|
||||
{ X86::AND16rr, X86::AND16rm, makeRMInst },
|
||||
{ X86::AND32rr, X86::AND32rm, makeRMInst },
|
||||
{ X86::AND8rr, X86::AND8rm, makeRMInst },
|
||||
{ X86::ANDNPDrr, X86::ANDNPDrm, makeRMInst },
|
||||
{ X86::ANDNPSrr, X86::ANDNPSrm, makeRMInst },
|
||||
{ X86::ANDPDrr, X86::ANDPDrm, makeRMInst },
|
||||
{ X86::ANDPSrr, X86::ANDPSrm, makeRMInst },
|
||||
{ X86::CMOVA16rr, X86::CMOVA16rm, makeRMInst },
|
||||
{ X86::CMOVA32rr, X86::CMOVA32rm, makeRMInst },
|
||||
{ X86::CMOVAE16rr, X86::CMOVAE16rm, makeRMInst },
|
||||
{ X86::CMOVAE32rr, X86::CMOVAE32rm, makeRMInst },
|
||||
{ X86::CMOVB16rr, X86::CMOVB16rm, makeRMInst },
|
||||
{ X86::CMOVB32rr, X86::CMOVB32rm, makeRMInst },
|
||||
{ X86::CMOVBE16rr, X86::CMOVBE16rm, makeRMInst },
|
||||
{ X86::CMOVBE32rr, X86::CMOVBE32rm, makeRMInst },
|
||||
{ X86::CMOVE16rr, X86::CMOVE16rm, makeRMInst },
|
||||
{ X86::CMOVE32rr, X86::CMOVE32rm, makeRMInst },
|
||||
{ X86::CMOVG16rr, X86::CMOVG16rm, makeRMInst },
|
||||
{ X86::CMOVG32rr, X86::CMOVG32rm, makeRMInst },
|
||||
{ X86::CMOVGE16rr, X86::CMOVGE16rm, makeRMInst },
|
||||
{ X86::CMOVGE32rr, X86::CMOVGE32rm, makeRMInst },
|
||||
{ X86::CMOVL16rr, X86::CMOVL16rm, makeRMInst },
|
||||
{ X86::CMOVL32rr, X86::CMOVL32rm, makeRMInst },
|
||||
{ X86::CMOVLE16rr, X86::CMOVLE16rm, makeRMInst },
|
||||
{ X86::CMOVLE32rr, X86::CMOVLE32rm, makeRMInst },
|
||||
{ X86::CMOVNE16rr, X86::CMOVNE16rm, makeRMInst },
|
||||
{ X86::CMOVNE32rr, X86::CMOVNE32rm, makeRMInst },
|
||||
{ X86::CMOVNP16rr, X86::CMOVNP16rm, makeRMInst },
|
||||
{ X86::CMOVNP32rr, X86::CMOVNP32rm, makeRMInst },
|
||||
{ X86::CMOVNS16rr, X86::CMOVNS16rm, makeRMInst },
|
||||
{ X86::CMOVNS32rr, X86::CMOVNS32rm, makeRMInst },
|
||||
{ X86::CMOVP16rr, X86::CMOVP16rm, makeRMInst },
|
||||
{ X86::CMOVS16rr, X86::CMOVS16rm, makeRMInst },
|
||||
{ X86::CMOVS32rr, X86::CMOVS32rm, makeRMInst },
|
||||
{ X86::CMOVP32rr, X86::CMOVP32rm, makeRMInst },
|
||||
{ X86::CMP16ri, X86::CMP16mi, makeMIInst },
|
||||
{ X86::CMP16ri8, X86::CMP16mi8, makeMIInst },
|
||||
{ X86::CMP16rr, X86::CMP16rm, makeRMInst },
|
||||
{ X86::CMP32ri, X86::CMP32mi, makeMIInst },
|
||||
{ X86::CMP32ri8, X86::CMP32mi8, makeRMInst },
|
||||
{ X86::CMP32rr, X86::CMP32rm, makeRMInst },
|
||||
{ X86::CMP8ri, X86::CMP8mi, makeRMInst },
|
||||
{ X86::CMP8rr, X86::CMP8rm, makeRMInst },
|
||||
{ X86::CMPPDrri, X86::CMPPDrmi, makeRMIInst },
|
||||
{ X86::CMPPSrri, X86::CMPPSrmi, makeRMIInst },
|
||||
{ X86::CMPSDrr, X86::CMPSDrm, makeRMInst },
|
||||
{ X86::CMPSSrr, X86::CMPSSrm, makeRMInst },
|
||||
{ X86::CVTSD2SSrr, X86::CVTSD2SSrm, makeRMInst },
|
||||
{ X86::CVTSI2SDrr, X86::CVTSI2SDrm, makeRMInst },
|
||||
{ X86::CVTSI2SSrr, X86::CVTSI2SSrm, makeRMInst },
|
||||
{ X86::CVTSS2SDrr, X86::CVTSS2SDrm, makeRMInst },
|
||||
{ X86::CVTTSD2SIrr, X86::CVTTSD2SIrm, makeRMInst },
|
||||
{ X86::CVTTSS2SIrr, X86::CVTTSS2SIrm, makeRMInst },
|
||||
{ X86::DIVPDrr, X86::DIVPDrm, makeRMInst },
|
||||
{ X86::DIVPSrr, X86::DIVPSrm, makeRMInst },
|
||||
{ X86::DIVSDrr, X86::DIVSDrm, makeRMInst },
|
||||
{ X86::DIVSSrr, X86::DIVSSrm, makeRMInst },
|
||||
{ X86::FsMOVAPDrr, X86::MOVSDrm, makeRMInst },
|
||||
{ X86::FsMOVAPSrr, X86::MOVSSrm, makeRMInst },
|
||||
{ X86::HADDPDrr, X86::HADDPDrm, makeRMInst },
|
||||
{ X86::HADDPSrr, X86::HADDPSrm, makeRMInst },
|
||||
{ X86::HSUBPDrr, X86::HSUBPDrm, makeRMInst },
|
||||
{ X86::HSUBPSrr, X86::HSUBPSrm, makeRMInst },
|
||||
{ X86::IMUL16rr, X86::IMUL16rm, makeRMInst },
|
||||
{ X86::IMUL16rri, X86::IMUL16rmi, makeRMIInst },
|
||||
{ X86::IMUL16rri8, X86::IMUL16rmi8, makeRMIInst },
|
||||
{ X86::IMUL32rr, X86::IMUL32rm, makeRMInst },
|
||||
{ X86::IMUL32rri, X86::IMUL32rmi, makeRMIInst },
|
||||
{ X86::IMUL32rri8, X86::IMUL32rmi8, makeRMIInst },
|
||||
{ X86::Int_CMPSDrr, X86::Int_CMPSDrm, makeRMInst },
|
||||
{ X86::Int_CMPSSrr, X86::Int_CMPSSrm, makeRMInst },
|
||||
{ X86::Int_COMISDrr, X86::Int_COMISDrm, makeRMInst },
|
||||
{ X86::Int_COMISSrr, X86::Int_COMISSrm, makeRMInst },
|
||||
{ X86::Int_CVTDQ2PDrr, X86::Int_CVTDQ2PDrm, makeRMInst },
|
||||
{ X86::Int_CVTDQ2PSrr, X86::Int_CVTDQ2PSrm, makeRMInst },
|
||||
{ X86::Int_CVTPD2DQrr, X86::Int_CVTPD2DQrm, makeRMInst },
|
||||
{ X86::Int_CVTPD2PSrr, X86::Int_CVTPD2PSrm, makeRMInst },
|
||||
{ X86::Int_CVTPS2DQrr, X86::Int_CVTPS2DQrm, makeRMInst },
|
||||
{ X86::Int_CVTPS2PDrr, X86::Int_CVTPS2PDrm, makeRMInst },
|
||||
{ X86::Int_CVTSD2SIrr, X86::Int_CVTSD2SIrm, makeRMInst },
|
||||
{ X86::Int_CVTSD2SSrr, X86::Int_CVTSD2SSrm, makeRMInst },
|
||||
{ X86::Int_CVTSI2SDrr, X86::Int_CVTSI2SDrm, makeRMInst },
|
||||
{ X86::Int_CVTSI2SSrr, X86::Int_CVTSI2SSrm, makeRMInst },
|
||||
{ X86::Int_CVTSS2SDrr, X86::Int_CVTSS2SDrm, makeRMInst },
|
||||
{ X86::Int_CVTSS2SIrr, X86::Int_CVTSS2SIrm, makeRMInst },
|
||||
{ X86::Int_CVTTPD2DQrr, X86::Int_CVTTPD2DQrm, makeRMInst },
|
||||
{ X86::Int_CVTTPS2DQrr, X86::Int_CVTTPS2DQrm, makeRMInst },
|
||||
{ X86::Int_CVTTSD2SIrr, X86::Int_CVTTSD2SIrm, makeRMInst },
|
||||
{ X86::Int_CVTTSS2SIrr, X86::Int_CVTTSS2SIrm, makeRMInst },
|
||||
{ X86::Int_UCOMISDrr, X86::Int_UCOMISDrm, makeRMInst },
|
||||
{ X86::Int_UCOMISSrr, X86::Int_UCOMISSrm, makeRMInst },
|
||||
{ X86::MAXPDrr, X86::MAXPDrm, makeRMInst },
|
||||
{ X86::MAXPSrr, X86::MAXPSrm, makeRMInst },
|
||||
{ X86::MINPDrr, X86::MINPDrm, makeRMInst },
|
||||
{ X86::MINPSrr, X86::MINPSrm, makeRMInst },
|
||||
{ X86::MOV16rr, X86::MOV16rm, makeRMInst },
|
||||
{ X86::MOV32rr, X86::MOV32rm, makeRMInst },
|
||||
{ X86::MOV8rr, X86::MOV8rm, makeRMInst },
|
||||
{ X86::MOVAPDrr, X86::MOVAPDrm, makeRMInst },
|
||||
{ X86::MOVAPSrr, X86::MOVAPSrm, makeRMInst },
|
||||
{ X86::MOVDDUPrr, X86::MOVDDUPrm, makeRMInst },
|
||||
{ X86::MOVDI2PDIrr, X86::MOVDI2PDIrm, makeRMInst },
|
||||
{ X86::MOVQI2PQIrr, X86::MOVQI2PQIrm, makeRMInst },
|
||||
{ X86::MOVSD2PDrr, X86::MOVSD2PDrm, makeRMInst },
|
||||
{ X86::MOVSDrr, X86::MOVSDrm, makeRMInst },
|
||||
{ X86::MOVSHDUPrr, X86::MOVSHDUPrm, makeRMInst },
|
||||
{ X86::MOVSLDUPrr, X86::MOVSLDUPrm, makeRMInst },
|
||||
{ X86::MOVSS2PSrr, X86::MOVSS2PSrm, makeRMInst },
|
||||
{ X86::MOVSSrr, X86::MOVSSrm, makeRMInst },
|
||||
{ X86::MOVSX16rr8, X86::MOVSX16rm8, makeRMInst },
|
||||
{ X86::MOVSX32rr16, X86::MOVSX32rm16, makeRMInst },
|
||||
{ X86::MOVSX32rr8, X86::MOVSX32rm8, makeRMInst },
|
||||
{ X86::MOVUPDrr, X86::MOVUPDrm, makeRMInst },
|
||||
{ X86::MOVUPSrr, X86::MOVUPSrm, makeRMInst },
|
||||
{ X86::MOVZX16rr8, X86::MOVZX16rm8, makeRMInst },
|
||||
{ X86::MOVZX32rr16, X86::MOVZX32rm16, makeRMInst },
|
||||
{ X86::MOVZX32rr8, X86::MOVZX32rm8, makeRMInst },
|
||||
{ X86::MULPDrr, X86::MULPDrm, makeRMInst },
|
||||
{ X86::MULPSrr, X86::MULPSrm, makeRMInst },
|
||||
{ X86::MULSDrr, X86::MULSDrm, makeRMInst },
|
||||
{ X86::MULSSrr, X86::MULSSrm, makeRMInst },
|
||||
{ X86::OR16rr, X86::OR16rm, makeRMInst },
|
||||
{ X86::OR32rr, X86::OR32rm, makeRMInst },
|
||||
{ X86::OR8rr, X86::OR8rm, makeRMInst },
|
||||
{ X86::ORPDrr, X86::ORPDrm, makeRMInst },
|
||||
{ X86::ORPSrr, X86::ORPSrm, makeRMInst },
|
||||
{ X86::PACKSSDWrr, X86::PACKSSDWrm, makeRMInst },
|
||||
{ X86::PACKSSWBrr, X86::PACKSSWBrm, makeRMInst },
|
||||
{ X86::PACKUSWBrr, X86::PACKUSWBrm, makeRMInst },
|
||||
{ X86::PADDBrr, X86::PADDBrm, makeRMInst },
|
||||
{ X86::PADDDrr, X86::PADDDrm, makeRMInst },
|
||||
{ X86::PADDSBrr, X86::PADDSBrm, makeRMInst },
|
||||
{ X86::PADDSWrr, X86::PADDSWrm, makeRMInst },
|
||||
{ X86::PADDWrr, X86::PADDWrm, makeRMInst },
|
||||
{ X86::PANDNrr, X86::PANDNrm, makeRMInst },
|
||||
{ X86::PANDrr, X86::PANDrm, makeRMInst },
|
||||
{ X86::PAVGBrr, X86::PAVGBrm, makeRMInst },
|
||||
{ X86::PAVGWrr, X86::PAVGWrm, makeRMInst },
|
||||
{ X86::PCMPEQBrr, X86::PCMPEQBrm, makeRMInst },
|
||||
{ X86::PCMPEQDrr, X86::PCMPEQDrm, makeRMInst },
|
||||
{ X86::PCMPEQWrr, X86::PCMPEQWrm, makeRMInst },
|
||||
{ X86::PCMPGTBrr, X86::PCMPGTBrm, makeRMInst },
|
||||
{ X86::PCMPGTDrr, X86::PCMPGTDrm, makeRMInst },
|
||||
{ X86::PCMPGTWrr, X86::PCMPGTWrm, makeRMInst },
|
||||
{ X86::PINSRWrri, X86::PINSRWrmi, makeRMIInst },
|
||||
{ X86::PMADDWDrr, X86::PMADDWDrm, makeRMInst },
|
||||
{ X86::PMAXSWrr, X86::PMAXSWrm, makeRMInst },
|
||||
{ X86::PMAXUBrr, X86::PMAXUBrm, makeRMInst },
|
||||
{ X86::PMINSWrr, X86::PMINSWrm, makeRMInst },
|
||||
{ X86::PMINUBrr, X86::PMINUBrm, makeRMInst },
|
||||
{ X86::PMULHUWrr, X86::PMULHUWrm, makeRMInst },
|
||||
{ X86::PMULHWrr, X86::PMULHWrm, makeRMInst },
|
||||
{ X86::PMULLWrr, X86::PMULLWrm, makeRMInst },
|
||||
{ X86::PMULUDQrr, X86::PMULUDQrm, makeRMInst },
|
||||
{ X86::PORrr, X86::PORrm, makeRMInst },
|
||||
{ X86::PSADBWrr, X86::PSADBWrm, makeRMInst },
|
||||
{ X86::PSHUFDri, X86::PSHUFDmi, makeRMIInst },
|
||||
{ X86::PSHUFHWri, X86::PSHUFHWmi, makeRMIInst },
|
||||
{ X86::PSHUFLWri, X86::PSHUFLWmi, makeRMIInst },
|
||||
{ X86::PSLLDrr, X86::PSLLDrm, makeRMInst },
|
||||
{ X86::PSLLQrr, X86::PSLLQrm, makeRMInst },
|
||||
{ X86::PSLLWrr, X86::PSLLWrm, makeRMInst },
|
||||
{ X86::PSRADrr, X86::PSRADrm, makeRMInst },
|
||||
{ X86::PSRAWrr, X86::PSRAWrm, makeRMInst },
|
||||
{ X86::PSRLDrr, X86::PSRLDrm, makeRMInst },
|
||||
{ X86::PSRLQrr, X86::PSRLQrm, makeRMInst },
|
||||
{ X86::PSRLWrr, X86::PSRLWrm, makeRMInst },
|
||||
{ X86::PSUBBrr, X86::PSUBBrm, makeRMInst },
|
||||
{ X86::PSUBDrr, X86::PSUBDrm, makeRMInst },
|
||||
{ X86::PSUBSBrr, X86::PSUBSBrm, makeRMInst },
|
||||
{ X86::PSUBSWrr, X86::PSUBSWrm, makeRMInst },
|
||||
{ X86::PSUBWrr, X86::PSUBWrm, makeRMInst },
|
||||
{ X86::PUNPCKHBWrr, X86::PUNPCKHBWrm, makeRMInst },
|
||||
{ X86::PUNPCKHDQrr, X86::PUNPCKHDQrm, makeRMInst },
|
||||
{ X86::PUNPCKHQDQrr, X86::PUNPCKHQDQrm, makeRMInst },
|
||||
{ X86::PUNPCKHWDrr, X86::PUNPCKHWDrm, makeRMInst },
|
||||
{ X86::PUNPCKLBWrr, X86::PUNPCKLBWrm, makeRMInst },
|
||||
{ X86::PUNPCKLDQrr, X86::PUNPCKLDQrm, makeRMInst },
|
||||
{ X86::PUNPCKLQDQrr, X86::PUNPCKLQDQrm, makeRMInst },
|
||||
{ X86::PUNPCKLWDrr, X86::PUNPCKLWDrm, makeRMInst },
|
||||
{ X86::PXORrr, X86::PXORrm, makeRMInst },
|
||||
{ X86::RCPPSr, X86::RCPPSm, makeRMInst },
|
||||
{ X86::RSQRTPSr, X86::RSQRTPSm, makeRMInst },
|
||||
{ X86::SBB32rr, X86::SBB32rm, makeRMInst },
|
||||
{ X86::SHUFPDrri, X86::SHUFPDrmi, makeRMIInst },
|
||||
{ X86::SHUFPSrri, X86::SHUFPSrmi, makeRMIInst },
|
||||
{ X86::SQRTPDr, X86::SQRTPDm, makeRMInst },
|
||||
{ X86::SQRTPSr, X86::SQRTPSm, makeRMInst },
|
||||
{ X86::SQRTSDr, X86::SQRTSDm, makeRMInst },
|
||||
{ X86::SQRTSSr, X86::SQRTSSm, makeRMInst },
|
||||
{ X86::SUB16rr, X86::SUB16rm, makeRMInst },
|
||||
{ X86::SUB32rr, X86::SUB32rm, makeRMInst },
|
||||
{ X86::SUB8rr, X86::SUB8rm, makeRMInst },
|
||||
{ X86::SUBPDrr, X86::SUBPDrm, makeRMInst },
|
||||
{ X86::SUBPSrr, X86::SUBPSrm, makeRMInst },
|
||||
{ X86::SUBSDrr, X86::SUBSDrm, makeRMInst },
|
||||
{ X86::SUBSSrr, X86::SUBSSrm, makeRMInst },
|
||||
{ X86::TEST16ri, X86::TEST16mi, makeMIInst },
|
||||
{ X86::TEST16rr, X86::TEST16rm, makeRMInst },
|
||||
{ X86::TEST32ri, X86::TEST32mi, makeMIInst },
|
||||
{ X86::TEST32rr, X86::TEST32rm, makeRMInst },
|
||||
{ X86::TEST8ri, X86::TEST8mi, makeMIInst },
|
||||
{ X86::TEST8rr, X86::TEST8rm, makeRMInst },
|
||||
{ X86::UCOMISDrr, X86::UCOMISDrm, makeRMInst },
|
||||
{ X86::UCOMISSrr, X86::UCOMISSrm, makeRMInst },
|
||||
{ X86::UNPCKHPDrr, X86::UNPCKHPDrm, makeRMInst },
|
||||
{ X86::UNPCKHPSrr, X86::UNPCKHPSrm, makeRMInst },
|
||||
{ X86::UNPCKLPDrr, X86::UNPCKLPDrm, makeRMInst },
|
||||
{ X86::UNPCKLPSrr, X86::UNPCKLPSrm, makeRMInst },
|
||||
{ X86::XCHG16rr, X86::XCHG16rm, makeRMInst },
|
||||
{ X86::XCHG32rr, X86::XCHG32rm, makeRMInst },
|
||||
{ X86::XCHG8rr, X86::XCHG8rm, makeRMInst },
|
||||
{ X86::XOR16rr, X86::XOR16rm, makeRMInst },
|
||||
{ X86::XOR32rr, X86::XOR32rm, makeRMInst },
|
||||
{ X86::XOR8rr, X86::XOR8rm, makeRMInst },
|
||||
{ X86::XORPDrr, X86::XORPDrm, makeRMInst },
|
||||
{ X86::XORPSrr, X86::XORPSrm, makeRMInst }
|
||||
};
|
||||
OpcodeTablePtr = OpcodeTable;
|
||||
OpcodeTableSize = ARRAY_SIZE(OpcodeTable);
|
||||
}
|
||||
|
||||
// If table selected
|
||||
if (OpcodeTablePtr) {
|
||||
// Opcode to translate
|
||||
unsigned fromOpcode = MI->getOpcode();
|
||||
// Type of make to use
|
||||
unsigned make;
|
||||
// Lookup fromOpcode in table
|
||||
int toOpcode = Lookup(OpcodeTablePtr, OpcodeTableSize, fromOpcode, make);
|
||||
|
||||
// If opcode found in table
|
||||
if (toOpcode != -1) {
|
||||
// Make new instruction
|
||||
switch (make) {
|
||||
case makeM0Inst: return MakeM0Inst(toOpcode, FrameIndex, MI);
|
||||
case makeMIInst: return MakeMIInst(toOpcode, FrameIndex, MI);
|
||||
case makeMInst: return MakeMInst(toOpcode, FrameIndex, MI);
|
||||
case makeMRIInst: return MakeMRIInst(toOpcode, FrameIndex, MI);
|
||||
case makeMRInst: return MakeMRInst(toOpcode, FrameIndex, MI);
|
||||
case makeRMIInst: return MakeRMIInst(toOpcode, FrameIndex, MI);
|
||||
case makeRMInst: return MakeRMInst(toOpcode, FrameIndex, MI);
|
||||
default: assert(0 && "Unknown instruction make");
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// No fusion
|
||||
if (PrintFailedFusing)
|
||||
std::cerr << "We failed to fuse ("
|
||||
<< ((i == 1) ? "r" : "s") << "): " << *MI;
|
||||
return NULL;
|
||||
}
|
||||
|
||||
|
||||
const unsigned *X86RegisterInfo::getCalleeSaveRegs() const {
|
||||
static const unsigned CalleeSaveRegs[] = {
|
||||
X86::ESI, X86::EDI, X86::EBX, X86::EBP, 0
|
||||
|
||||
Loading…
Reference in New Issue
Block a user