From f1aa47dc1aed018e2f70ffe7d32dba51e2ac45fe Mon Sep 17 00:00:00 2001 From: Jim Grosbach Date: Mon, 29 Nov 2010 19:32:47 +0000 Subject: [PATCH] ARM Pseudo-ize tBR_JTr. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120310 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/ARMAsmPrinter.cpp | 20 +++++++------------- lib/Target/ARM/ARMInstrFormats.td | 10 +++++++--- lib/Target/ARM/ARMInstrInfo.td | 3 --- lib/Target/ARM/ARMInstrThumb.td | 13 +++++-------- lib/Target/ARM/InstPrinter/ARMInstPrinter.h | 1 - 5 files changed, 19 insertions(+), 28 deletions(-) diff --git a/lib/Target/ARM/ARMAsmPrinter.cpp b/lib/Target/ARM/ARMAsmPrinter.cpp index 84ddab99aaa..da1c087c7fe 100644 --- a/lib/Target/ARM/ARMAsmPrinter.cpp +++ b/lib/Target/ARM/ARMAsmPrinter.cpp @@ -936,23 +936,13 @@ void ARMAsmPrinter::EmitInstruction(const MachineInstr *MI) { EmitJump2Table(MI); return; } - case ARM::tBR_JTr: { - // Lower and emit the instruction itself, then the jump table following it. - MCInst TmpInst; - // FIXME: The branch instruction is really a pseudo. We should xform it - // explicitly. - LowerARMMachineInstrToMCInst(MI, TmpInst, *this); - OutStreamer.EmitInstruction(TmpInst); - - // Output the data for the jump table itself - EmitJumpTable(MI); - return; - } + case ARM::tBR_JTr: case ARM::BR_JTr: { // Lower and emit the instruction itself, then the jump table following it. // mov pc, target MCInst TmpInst; - TmpInst.setOpcode(ARM::MOVr); + unsigned Opc = MI->getOpcode() == ARM::BR_JTr ? ARM::MOVr : ARM::tMOVr; + TmpInst.setOpcode(Opc); TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); // Add predicate operands. @@ -960,6 +950,10 @@ void ARMAsmPrinter::EmitInstruction(const MachineInstr *MI) { TmpInst.addOperand(MCOperand::CreateReg(0)); OutStreamer.EmitInstruction(TmpInst); + // Make sure the Thumb jump table is 4-byte aligned. + if (Opc == ARM::tMOVr) + EmitAlignment(2); + // Output the data for the jump table itself EmitJumpTable(MI); return; diff --git a/lib/Target/ARM/ARMInstrFormats.td b/lib/Target/ARM/ARMInstrFormats.td index a5f89d6e49f..04c9b0e52af 100644 --- a/lib/Target/ARM/ARMInstrFormats.td +++ b/lib/Target/ARM/ARMInstrFormats.td @@ -255,6 +255,13 @@ class ARMPseudoInst Predicates = [IsARM]; } +// PseudoInst that's Thumb-mode only. +class tPseudoInst pattern> + : PseudoInst { + let SZ = sz; + list Predicates = [IsThumb]; +} // Almost all ARM instructions are predicable. class I pattern> : Thumb1I; -class T1JTI pattern> - : Thumb1I; // Two-address instructions class T1It { let PrintMethod = "printCPInstOperand"; } -def jtblock_operand : Operand { - let PrintMethod = "printJTBlockOperand"; -} def jt2block_operand : Operand { let PrintMethod = "printJT2BlockOperand"; } diff --git a/lib/Target/ARM/ARMInstrThumb.td b/lib/Target/ARM/ARMInstrThumb.td index 3af89341196..568cbc6c6c6 100644 --- a/lib/Target/ARM/ARMInstrThumb.td +++ b/lib/Target/ARM/ARMInstrThumb.td @@ -439,14 +439,11 @@ let isBranch = 1, isTerminator = 1 in { def tBfar : TIx2<0b11110, 0b11, 1, (outs), (ins brtarget:$target), IIC_Br, "bl\t$target",[]>; - let isCodeGenOnly = 1 in - def tBR_JTr : T1JTI<(outs), - (ins tGPR:$target, jtblock_operand:$jt, i32imm:$id), - IIC_Br, "mov\tpc, $target\n\t.align\t2$jt", - [(ARMbrjt tGPR:$target, tjumptable:$jt, imm:$id)]>, - Encoding16 { - let Inst{15-7} = 0b010001101; - let Inst{2-0} = 0b111; + def tBR_JTr : tPseudoInst<(outs), + (ins tGPR:$target, i32imm:$jt, i32imm:$id), + Size2Bytes, IIC_Br, + [(ARMbrjt tGPR:$target, tjumptable:$jt, imm:$id)]> { + list Predicates = [IsThumb, IsThumb1Only]; } } } diff --git a/lib/Target/ARM/InstPrinter/ARMInstPrinter.h b/lib/Target/ARM/InstPrinter/ARMInstPrinter.h index e69a0e0d8f7..55605ead067 100644 --- a/lib/Target/ARM/InstPrinter/ARMInstPrinter.h +++ b/lib/Target/ARM/InstPrinter/ARMInstPrinter.h @@ -96,7 +96,6 @@ public: void printRegisterList(const MCInst *MI, unsigned OpNum, raw_ostream &O); // The jump table instructions have custom handling in ARMAsmPrinter // to output the jump table. Nothing further is necessary here. - void printJTBlockOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) {} void printJT2BlockOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) {} void printTBAddrMode(const MCInst *MI, unsigned OpNum, raw_ostream &O); void printNoHashImmediate(const MCInst *MI, unsigned OpNum, raw_ostream &O);