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arm asm: Let .fpu enable instructions, PR20447.

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I'm not very happy with duplicating the fpu->feature mapping in ARMAsmParser.cpp
and in clang's driver. See the bug for a patch that doesn't do that, and the
review thread [1] for why this duplication exists.

1: http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20140811/231052.html


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215811 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Nico Weber 2014-08-16 05:37:51 +00:00
parent e1167f1319
commit f1aba61bb5
2 changed files with 52 additions and 0 deletions
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36
lib/Target/ARM/AsmParser/ARMAsmParser.cpp
View File

@ -8751,6 +8751,30 @@ bool ARMAsmParser::parseDirectiveCPU(SMLoc L) {
return false;
}
// FIXME: This is duplicated in getARMFPUFeatures() in
// tools/clang/lib/Driver/Tools.cpp
static const struct {
const unsigned Fpu;
const uint64_t Enabled;
const uint64_t Disabled;
} Fpus[] = {
{ARM::VFP, ARM::FeatureVFP2, ARM::FeatureNEON},
{ARM::VFPV2, ARM::FeatureVFP2, ARM::FeatureNEON},
{ARM::VFPV3, ARM::FeatureVFP3, ARM::FeatureNEON},
{ARM::VFPV3_D16, ARM::FeatureVFP3 | ARM::FeatureD16, ARM::FeatureNEON},
{ARM::VFPV4, ARM::FeatureVFP4, ARM::FeatureNEON},
{ARM::VFPV4_D16, ARM::FeatureVFP4 | ARM::FeatureD16, ARM::FeatureNEON},
{ARM::FP_ARMV8, ARM::FeatureFPARMv8,
ARM::FeatureNEON | ARM::FeatureCrypto},
{ARM::NEON, ARM::FeatureNEON, 0},
{ARM::NEON_VFPV4, ARM::FeatureVFP4 | ARM::FeatureNEON, 0},
{ARM::NEON_FP_ARMV8, ARM::FeatureFPARMv8 | ARM::FeatureNEON,
ARM::FeatureCrypto},
{ARM::CRYPTO_NEON_FP_ARMV8,
ARM::FeatureFPARMv8 | ARM::FeatureNEON | ARM::FeatureCrypto, 0},
{ARM::SOFTVFP, 0, 0},
};
/// parseDirectiveFPU
/// ::= .fpu str
bool ARMAsmParser::parseDirectiveFPU(SMLoc L) {
@ -8766,6 +8790,18 @@ bool ARMAsmParser::parseDirectiveFPU(SMLoc L) {
return false;
}
for (const auto &Fpu : Fpus) {
if (Fpu.Fpu != ID)
continue;
// Need to toggle features that should be on but are off and that
// should off but are on.
unsigned Toggle = (Fpu.Enabled & ~STI.getFeatureBits()) |
(Fpu.Disabled & STI.getFeatureBits());
setAvailableFeatures(ComputeAvailableFeatures(STI.ToggleFeature(Toggle)));
break;
}
getTargetStreamer().emitFPU(ID);
return false;
}

16
test/MC/ARM/directive-fpu-instrs.s Normal file
View File

@ -0,0 +1,16 @@
// RUN: llvm-mc -triple armv7-unknown-linux-gnueabi -mattr=+vfp3,+d16,-neon %s
.fpu neon
VAND d3, d5, d5
vldr d21, [r7, #296]
@ .thumb should not disable the prior .fpu neon
.thumb
vmov q4, q11 @ v4si
str r6, [r7, #264]
mov r6, r5
vldr d21, [r7, #296]
add r9, r7, #216
fstmfdd sp!, {d8, d9, d10, d11, d12, d13, d14, d15}