1. Simplfy bit operations.

2. Coalesce instruction cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29135 91177308-0d34-0410-b5e6-96231b3b80d8

utils/TableGen/CodeEmitterGen.cpp

@@ -16,58 +16,49 @@
 #include "CodeEmitterGen.h"
 #include "CodeGenTarget.h"
 #include "Record.h"
+#include "llvm/ADT/StringExtras.h"
 #include "llvm/Support/Debug.h"
 using namespace llvm;
 
-void CodeEmitterGen::emitInstrOpBits(std::ostream &o,
+void CodeEmitterGen::reverseBits(std::vector<Record*> &Insts) {
-                                     const std::vector<RecordVal> &Vals,
+  for (std::vector<Record*>::iterator I = Insts.begin(), E = Insts.end();
-                                     std::map<std::string, unsigned> &OpOrder,
+       I != E; ++I) {
-                                     std::map<std::string, bool> &OpContinuous)
+    Record *R = *I;
-{
+    if (R->getName() == "PHI" || R->getName() == "INLINEASM") continue;
-  for (unsigned f = 0, e = Vals.size(); f != e; ++f) {
-    if (Vals[f].getPrefix()) {
-      BitsInit *FieldInitializer = (BitsInit*)Vals[f].getValue();
     
-      // Scan through the field looking for bit initializers of the current
+    BitsInit *BI = R->getValueAsBitsInit("Inst");
-      // variable...
+
-      for (int i = FieldInitializer->getNumBits()-1; i >= 0; --i) {
+    unsigned numBits = BI->getNumBits();
-        Init *I = FieldInitializer->getBit(i);
+    BitsInit *NewBI = new BitsInit(numBits);
-        if (BitInit *BI = dynamic_cast<BitInit*>(I)) {
+    for (unsigned bit = 0, end = numBits / 2; bit != end; ++bit) {
-          DEBUG(o << "      // bit init: f: " << f << ", i: " << i << "\n");
+      unsigned bitSwapIdx = numBits - bit - 1;
-        } else if (UnsetInit *UI = dynamic_cast<UnsetInit*>(I)) {
+      Init *OrigBit = BI->getBit(bit);
-          DEBUG(o << "      // unset init: f: " << f << ", i: " << i << "\n");
+      Init *BitSwap = BI->getBit(bitSwapIdx);
-        } else if (VarBitInit *VBI = dynamic_cast<VarBitInit*>(I)) {
+      NewBI->setBit(bit, BitSwap);
+      NewBI->setBit(bitSwapIdx, OrigBit);
+    }
+    if (numBits % 2) {
+      unsigned middle = (numBits + 1) / 2;
+      NewBI->setBit(middle, BI->getBit(middle));
+    }
+    
+    // Update the bits in reversed order so that emitInstrOpBits will get the
+    // correct endianness.
+    R->getValue("Inst")->setValue(NewBI);
+  }
+}
+
+
+int CodeEmitterGen::getVariableBit(const std::string &VarName, BitsInit *BI, int bit){
+  if (VarBitInit *VBI = dynamic_cast<VarBitInit*>(BI->getBit(bit))) {
     TypedInit *TI = VBI->getVariable();
-          if (VarInit *VI = dynamic_cast<VarInit*>(TI)) {
-            // If the bits of the field are laid out consecutively in the
-            // instruction, then instead of separately ORing in bits, just
-            // mask and shift the entire field for efficiency.
-            if (OpContinuous[VI->getName()]) {
-              // already taken care of in the loop above, thus there is no
-              // need to individually OR in the bits
     
-              // for debugging, output the regular version anyway, commented
+    if (VarInit *VI = dynamic_cast<VarInit*>(TI)) {
-              DEBUG(o << "      // Value |= getValueBit(op"
+      if (VI->getName() == VarName) return VBI->getBitNum();
-                      << OpOrder[VI->getName()] << ", " << VBI->getBitNum()
-                      << ")" << " << " << i << ";\n");
-            } else {
-              o << "      Value |= getValueBit(op" << OpOrder[VI->getName()]
-                << ", " << VBI->getBitNum()
-                << ")" << " << " << i << ";\n";
-            }
-          } else if (FieldInit *FI = dynamic_cast<FieldInit*>(TI)) {
-            // FIXME: implement this!
-            std::cerr << "Error: FieldInit not implemented!\n";
-            abort();
-          } else {
-            std::cerr << "Error: unimplemented case in "
-                      << "CodeEmitterGen::emitInstrOpBits()\n";
-            abort();
-          }
-        }
-      }
     }
   }
+  
+  return -1;
 } 
 
 
@@ -75,6 +66,9 @@ void CodeEmitterGen::run(std::ostream &o) {
   CodeGenTarget Target;
   std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
   
+  // For little-endian instruction bit encodings, reverse the bit order
+  if (Target.isLittleEndianEncoding()) reverseBits(Insts);
+
   EmitSourceFileHeader("Machine Code Emitter", o);
   std::string Namespace = Insts[0]->getValueAsString("Namespace") + "::";
   
@@ -103,28 +97,6 @@ void CodeEmitterGen::run(std::ostream &o) {
     
     BitsInit *BI = R->getValueAsBitsInit("Inst");
 
-    // For little-endian instruction bit encodings, reverse the bit order
-    if (Target.isLittleEndianEncoding()) {
-      unsigned numBits = BI->getNumBits();
-      BitsInit *NewBI = new BitsInit(numBits);
-      for (unsigned bit = 0, end = numBits / 2; bit != end; ++bit) {
-        unsigned bitSwapIdx = numBits - bit - 1;
-        Init *OrigBit = BI->getBit(bit);
-        Init *BitSwap = BI->getBit(bitSwapIdx);
-        NewBI->setBit(bit, BitSwap);
-        NewBI->setBit(bitSwapIdx, OrigBit);
-      }
-      if (numBits % 2) {
-        unsigned middle = (numBits + 1) / 2;
-        NewBI->setBit(middle, BI->getBit(middle));
-      }
-      BI = NewBI;
-      
-      // Update the bits in reversed order so that emitInstrOpBits will get the
-      // correct endianness.
-      R->getValue("Inst")->setValue(NewBI);
-    }
-
     unsigned Value = 0;
     const std::vector<RecordVal> &Vals = R->getValues();
 
@@ -138,18 +110,17 @@ void CodeEmitterGen::run(std::ostream &o) {
   }
   o << "\n  };\n";
   
-  // Emit initial function code
+  // Map to accumulate all the cases.
-  o << "  const unsigned opcode = MI.getOpcode();\n"
+  std::map<std::string, std::vector<std::string> > CaseMap;
-    << "  unsigned Value = InstBits[opcode];\n"
-    << "  switch (opcode) {\n";
   
-  // Emit a case statement for each opcode
+  // Construct all cases statement for each opcode
-  for (std::vector<Record*>::iterator I = Insts.begin(), E = Insts.end();
+  for (std::vector<Record*>::iterator IC = Insts.begin(), EC = Insts.end();
-       I != E; ++I) {
+        IC != EC; ++IC) {
-    Record *R = *I;
+    Record *R = *IC;
-    if (R->getName() == "PHI" || R->getName() == "INLINEASM") continue;
+    const std::string &InstName = R->getName();
+    std::string Case("");
     
-    o << "    case " << Namespace << R->getName() << ": {\n";
+    if (InstName == "PHI" || InstName == "INLINEASM") continue;
     
     BitsInit *BI = R->getValueAsBitsInit("Inst");
     const std::vector<RecordVal> &Vals = R->getValues();
@@ -157,116 +128,80 @@ void CodeEmitterGen::run(std::ostream &o) {
     // Loop over all of the fields in the instruction, determining which are the
     // operands to the instruction.
     unsigned op = 0;
-    std::map<std::string, unsigned> OpOrder;
-    std::map<std::string, bool> OpContinuous;
     for (unsigned i = 0, e = Vals.size(); i != e; ++i) {
       if (!Vals[i].getPrefix() && !Vals[i].getValue()->isComplete()) {
         // Is the operand continuous? If so, we can just mask and OR it in
         // instead of doing it bit-by-bit, saving a lot in runtime cost.
-        BitsInit *InstInit = BI;
+        const std::string &VarName = Vals[i].getName();
-        int beginBitInVar = -1, endBitInVar = -1;
+        bool gotOp = false;
-        int beginBitInInst = -1, endBitInInst = -1;
-        bool continuous = true;
         
-        for (int bit = InstInit->getNumBits()-1; bit >= 0; --bit) {
+        for (int bit = BI->getNumBits()-1; bit >= 0; ) {
-          if (VarBitInit *VBI =
+          int varBit = getVariableBit(VarName, BI, bit);
-              dynamic_cast<VarBitInit*>(InstInit->getBit(bit))) {
-            TypedInit *TI = VBI->getVariable();
-            if (VarInit *VI = dynamic_cast<VarInit*>(TI)) {
-              // only process the current variable
-              if (VI->getName() != Vals[i].getName())
-                continue;
           
-              if (beginBitInVar == -1)
+          if (varBit == -1) {
-                beginBitInVar = VBI->getBitNum();
+            --bit;
+          } else {
+            int beginInstBit = bit;
+            int beginVarBit = varBit;
+            int N = 1;
             
-              if (endBitInVar == -1)
+            for (--bit; bit >= 0;) {
-                endBitInVar = VBI->getBitNum();
+              varBit = getVariableBit(VarName, BI, bit);
-              else {
+              if (varBit == -1 || varBit != (beginVarBit - N)) break;
-                if (endBitInVar == (int)VBI->getBitNum() + 1)
+              ++N;
-                  endBitInVar = VBI->getBitNum();
+              --bit;
-                else {
-                  continuous = false;
-                  break;
-                }
             }
 
-              if (beginBitInInst == -1)
+            if (!gotOp) {
-                beginBitInInst = bit;
+              Case += "      // op: " + VarName + "\n"
-              if (endBitInInst == -1)
+                   +  "      op = getMachineOpValue(MI, MI.getOperand("
-                endBitInInst = bit;
+                   +  utostr(op++)
-              else {
+                   +  "));\n";
-                if (endBitInInst == bit + 1)
+              gotOp = true;
-                  endBitInInst = bit;
-                else {
-                  continuous = false;
-                  break;
-                }
             }
             
-              // maintain same distance between bits in field and bits in
+            unsigned opMask = (1 << N) - 1;
-              // instruction. if the relative distances stay the same
+            int opShift = beginVarBit - N + 1;
-              // throughout,
+            opMask <<= opShift;
-              if (beginBitInVar - (int)VBI->getBitNum() !=
+            opShift = beginInstBit - beginVarBit;
-                  beginBitInInst - bit) {
+            
-                continuous = false;
+            if (opShift > 0) {
-                break;
+              Case += "      Value |= (op & " + utostr(opMask) + "U) << "
+                   +  itostr(opShift) + ";\n";
+            } else if (opShift < 0) {
+              Case += "      Value |= (op & " + utostr(opMask) + "U) >> "
+                   +  itostr(-opShift) + ";\n";
+            } else {
+              Case += "      Value |= op & " + utostr(opMask) + "U;\n";
+            }
           }
         }
       }
     }
 
-        // If we have found no bit in "Inst" which comes from this field, then
+    std::vector<std::string> &InstList =  CaseMap[Case];
-        // this is not an operand!!
+    InstList.push_back(InstName);
-        if (beginBitInInst != -1) {
-          o << "      // op" << op << ": " << Vals[i].getName() << "\n"
-            << "      int op" << op
-            <<" = getMachineOpValue(MI, MI.getOperand("<<op<<"));\n";
-          //<< "   MachineOperand &op" << op <<" = MI.getOperand("<<op<<");\n";
-          OpOrder[Vals[i].getName()] = op++;
-
-          DEBUG(o << "      // Var: begin = " << beginBitInVar
-                  << ", end = " << endBitInVar
-                  << "; Inst: begin = " << beginBitInInst
-                  << ", end = " << endBitInInst << "\n");
-
-          if (continuous) {
-            DEBUG(o << "      // continuous: op" << OpOrder[Vals[i].getName()]
-                    << "\n");
-
-            // Mask off the right bits
-            // Low mask (ie. shift, if necessary)
-            assert(endBitInVar >= 0 && "Negative shift amount in masking!");
-            if (endBitInVar != 0) {
-              o << "      op" << OpOrder[Vals[i].getName()]
-                << " >>= " << endBitInVar << ";\n";
-              beginBitInVar -= endBitInVar;
-              endBitInVar = 0;
   }
 
-            // High mask
-            o << "      op" << OpOrder[Vals[i].getName()]
-              << " &= (1<<" << beginBitInVar+1 << ") - 1;\n";
 
-            // Shift the value to the correct place (according to place in inst)
+  // Emit initial function code
-            assert(endBitInInst >= 0 && "Negative shift amount!");
+  o << "  const unsigned opcode = MI.getOpcode();\n"
-            if (endBitInInst != 0)
+    << "  unsigned Value = InstBits[opcode];\n"
-              o << "      op" << OpOrder[Vals[i].getName()]
+    << "  unsigned op;\n"
-              << " <<= " << endBitInInst << ";\n";
+    << "  switch (opcode) {\n";
 
-            // Just OR in the result
+  // Emit each case statement
-            o << "      Value |= op" << OpOrder[Vals[i].getName()] << ";\n";
+  std::map<std::string, std::vector<std::string> >::iterator IE, EE;
+  for (IE = CaseMap.begin(), EE = CaseMap.end(); IE != EE; ++IE) {
+    const std::string &Case = IE->first;
+    std::vector<std::string> &InstList = IE->second;
+
+    for (int i = 0, N = InstList.size(); i < N; i++) {
+      if (i) o << "\n";
+      o << "    case " << Namespace << InstList[i]  << ":";
     }
-
+    o << " {\n";
-          // otherwise, will be taken care of in the loop below using this
+    o << Case;
-          // value:
-          OpContinuous[Vals[i].getName()] = continuous;
-        }
-      }
-    }
-
-    emitInstrOpBits(o, Vals, OpOrder, OpContinuous);
-
     o << "      break;\n"
       << "    }\n";
   }

utils/TableGen/CodeEmitterGen.h

@@ -17,10 +17,12 @@
 #include "TableGenBackend.h"
 #include <map>
 #include <vector>
+#include <string>
 
 namespace llvm {
 
 class RecordVal;
+class BitsInit;
 
 class CodeEmitterGen : public TableGenBackend {
   RecordKeeper &Records;
@@ -32,10 +34,8 @@ public:
 private:
   void emitMachineOpEmitter(std::ostream &o, const std::string &Namespace);
   void emitGetValueBit(std::ostream &o, const std::string &Namespace);
-  void emitInstrOpBits(std::ostream &o,
+  void reverseBits(std::vector<Record*> &Insts);
-                       const std::vector<RecordVal> &Vals,
+  int getVariableBit(const std::string &VarName, BitsInit *BI, int bit);
-                       std::map<std::string, unsigned> &OpOrder,
-                       std::map<std::string, bool> &OpContinuous);
 };
 
 } // End llvm namespace