From f216421181393fd3993b47960de44ad448710fb9 Mon Sep 17 00:00:00 2001
From: Alkis Evlogimenos <alkis@evlogimenos.com>
Date: Sun, 22 Feb 2004 06:54:26 +0000
Subject: [PATCH] When folding memory operands in machine instructions be
careful to leave register operands with the same use/def flags as the
original instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11709 91177308-0d34-0410-b5e6-96231b3b80d8
---
include/llvm/CodeGen/MachineInstr.h | 7 +++++++
lib/Target/X86/X86RegisterInfo.cpp | 6 ++++--
2 files changed, 11 insertions(+), 2 deletions(-)
diff --git a/include/llvm/CodeGen/MachineInstr.h b/include/llvm/CodeGen/MachineInstr.h
index a90f1333a58..65d5ccae70a 100644
--- a/include/llvm/CodeGen/MachineInstr.h
+++ b/include/llvm/CodeGen/MachineInstr.h
@@ -197,6 +197,13 @@ public:
///
MachineOperandType getType() const { return opType; }
+ /// getUseType - Returns the MachineOperandUseType of this operand.
+ ///
+ MOTy::UseType getUseType() const {
+ return isUse() ^ isDef() ? MOTy::UseAndDef :
+ (isUse() ? MOTy::Use : MOTy::Def);
+ }
+
/// isPCRelative - This returns the value of the PCRELATIVE flag, which
/// indicates whether this operand should be emitted as a PC relative value
/// instead of a global address. This is used for operands of the forms:
diff --git a/lib/Target/X86/X86RegisterInfo.cpp b/lib/Target/X86/X86RegisterInfo.cpp
index 6479ad56a7e..d97b5295315 100644
--- a/lib/Target/X86/X86RegisterInfo.cpp
+++ b/lib/Target/X86/X86RegisterInfo.cpp
@@ -112,13 +112,15 @@ static MachineInstr *MakeMIInst(unsigned Opcode, unsigned FrameIndex,
static MachineInstr *MakeRMInst(unsigned Opcode, unsigned FrameIndex,
MachineInstr *MI) {
- return addFrameReference(BuildMI(Opcode, 5, MI->getOperand(0).getReg()),
+ const MachineOperand& op = MI->getOperand(0);
+ return addFrameReference(BuildMI(Opcode, 5, op.getReg(), op.getUseType()),
FrameIndex);
}
static MachineInstr *MakeRMIInst(unsigned Opcode, unsigned FrameIndex,
MachineInstr *MI) {
- return addFrameReference(BuildMI(Opcode, 5, MI->getOperand(0).getReg()),
+ const MachineOperand& op = MI->getOperand(0);
+ return addFrameReference(BuildMI(Opcode, 5, op.getReg(), op.getUseType()),
FrameIndex).addZImm(MI->getOperand(2).getImmedValue());
}