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Fix shuffle decoding for memory forms for (V)SHUFPS/D.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145392 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper 2011-11-29 07:58:09 +00:00
parent 36e36ace77
commit f267972d28
2 changed files with 30 additions and 6 deletions
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18
lib/Target/X86/InstPrinter/X86InstComments.cpp
View File

@ -163,14 +163,16 @@ void llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
Src2Name = getRegName(MI->getOperand(2).getReg()); Src2Name = getRegName(MI->getOperand(2).getReg());
// FALL THROUGH. // FALL THROUGH.
case X86::SHUFPDrmi: case X86::SHUFPDrmi:
DecodeSHUFPMask(MVT::v2f64, MI->getOperand(3).getImm(), ShuffleMask); DecodeSHUFPMask(MVT::v2f64, MI->getOperand(MI->getNumOperands()-1).getImm(),
ShuffleMask);
Src1Name = getRegName(MI->getOperand(0).getReg()); Src1Name = getRegName(MI->getOperand(0).getReg());
break; break;
case X86::VSHUFPDrri: case X86::VSHUFPDrri:
Src2Name = getRegName(MI->getOperand(2).getReg()); Src2Name = getRegName(MI->getOperand(2).getReg());
// FALL THROUGH. // FALL THROUGH.
case X86::VSHUFPDrmi: case X86::VSHUFPDrmi:
DecodeSHUFPMask(MVT::v2f64, MI->getOperand(3).getImm(), ShuffleMask); DecodeSHUFPMask(MVT::v2f64, MI->getOperand(MI->getNumOperands()-1).getImm(),
ShuffleMask);
Src1Name = getRegName(MI->getOperand(1).getReg()); Src1Name = getRegName(MI->getOperand(1).getReg());
DestName = getRegName(MI->getOperand(0).getReg()); DestName = getRegName(MI->getOperand(0).getReg());
break; break;
@ -178,7 +180,8 @@ void llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
Src2Name = getRegName(MI->getOperand(2).getReg()); Src2Name = getRegName(MI->getOperand(2).getReg());
// FALL THROUGH. // FALL THROUGH.
case X86::VSHUFPDYrmi: case X86::VSHUFPDYrmi:
DecodeSHUFPMask(MVT::v4f64, MI->getOperand(3).getImm(), ShuffleMask); DecodeSHUFPMask(MVT::v4f64, MI->getOperand(MI->getNumOperands()-1).getImm(),
ShuffleMask);
Src1Name = getRegName(MI->getOperand(1).getReg()); Src1Name = getRegName(MI->getOperand(1).getReg());
DestName = getRegName(MI->getOperand(0).getReg()); DestName = getRegName(MI->getOperand(0).getReg());
break; break;
@ -187,14 +190,16 @@ void llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
Src2Name = getRegName(MI->getOperand(2).getReg()); Src2Name = getRegName(MI->getOperand(2).getReg());
// FALL THROUGH. // FALL THROUGH.
case X86::SHUFPSrmi: case X86::SHUFPSrmi:
DecodeSHUFPMask(MVT::v4f32, MI->getOperand(3).getImm(), ShuffleMask); DecodeSHUFPMask(MVT::v4f32, MI->getOperand(MI->getNumOperands()-1).getImm(),
ShuffleMask);
Src1Name = getRegName(MI->getOperand(0).getReg()); Src1Name = getRegName(MI->getOperand(0).getReg());
break; break;
case X86::VSHUFPSrri: case X86::VSHUFPSrri:
Src2Name = getRegName(MI->getOperand(2).getReg()); Src2Name = getRegName(MI->getOperand(2).getReg());
// FALL THROUGH. // FALL THROUGH.
case X86::VSHUFPSrmi: case X86::VSHUFPSrmi:
DecodeSHUFPMask(MVT::v4f32, MI->getOperand(3).getImm(), ShuffleMask); DecodeSHUFPMask(MVT::v4f32, MI->getOperand(MI->getNumOperands()-1).getImm(),
ShuffleMask);
Src1Name = getRegName(MI->getOperand(1).getReg()); Src1Name = getRegName(MI->getOperand(1).getReg());
DestName = getRegName(MI->getOperand(0).getReg()); DestName = getRegName(MI->getOperand(0).getReg());
break; break;
@ -202,7 +207,8 @@ void llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
Src2Name = getRegName(MI->getOperand(2).getReg()); Src2Name = getRegName(MI->getOperand(2).getReg());
// FALL THROUGH. // FALL THROUGH.
case X86::VSHUFPSYrmi: case X86::VSHUFPSYrmi:
DecodeSHUFPMask(MVT::v8f32, MI->getOperand(3).getImm(), ShuffleMask); DecodeSHUFPMask(MVT::v8f32, MI->getOperand(MI->getNumOperands()-1).getImm(),
ShuffleMask);
Src1Name = getRegName(MI->getOperand(1).getReg()); Src1Name = getRegName(MI->getOperand(1).getReg());
DestName = getRegName(MI->getOperand(0).getReg()); DestName = getRegName(MI->getOperand(0).getReg());
break; break;

18
test/CodeGen/X86/avx-vshufp.ll
View File

@ -7,6 +7,15 @@ entry:
ret <8 x float> %shuffle ret <8 x float> %shuffle
} }
; CHECK: vshufps $-53, (%
define <8 x float> @A2(<8 x float>* %a, <8 x float>* %b) nounwind uwtable readnone ssp {
entry:
%a2 = load <8 x float>* %a
%b2 = load <8 x float>* %b
%shuffle = shufflevector <8 x float> %a2, <8 x float> %b2, <8 x i32> <i32 3, i32 2, i32 8, i32 11, i32 7, i32 6, i32 12, i32 15>
ret <8 x float> %shuffle
}
; CHECK: vshufpd $10, %ymm ; CHECK: vshufpd $10, %ymm
define <4 x double> @B(<4 x double> %a, <4 x double> %b) nounwind uwtable readnone ssp { define <4 x double> @B(<4 x double> %a, <4 x double> %b) nounwind uwtable readnone ssp {
entry: entry:
@ -14,6 +23,15 @@ entry:
ret <4 x double> %shuffle ret <4 x double> %shuffle
} }
; CHECK: vshufpd $10, (%
define <4 x double> @B2(<4 x double>* %a, <4 x double>* %b) nounwind uwtable readnone ssp {
entry:
%a2 = load <4 x double>* %a
%b2 = load <4 x double>* %b
%shuffle = shufflevector <4 x double> %a2, <4 x double> %b2, <4 x i32> <i32 0, i32 5, i32 2, i32 7>
ret <4 x double> %shuffle
}
; CHECK: vshufps $-53, %ymm ; CHECK: vshufps $-53, %ymm
define <8 x float> @C(<8 x float> %a, <8 x float> %b) nounwind uwtable readnone ssp { define <8 x float> @C(<8 x float> %a, <8 x float> %b) nounwind uwtable readnone ssp {
entry: entry: