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Add support for the Sparc implementation-defined "ASR" registers.

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(Note that register "Y" is essentially just ASR0).

Also added some test cases for divide and multiply, which had none before.

Differential Revision: http://reviews.llvm.org/D8670

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237580 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
James Y Knight
2015-05-18 16:29:48 +00:00
parent d811b4bacb
commit f272788a95
8 changed files with 172 additions and 20 deletions
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48
test/CodeGen/SPARC/basictest.ll
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@@ -36,3 +36,51 @@ entry:
ret i32 0
}
; CHECK-LABEL: signed_divide:
; CHECK: sra %o0, 31, %o2
; CHECK: wr %o2, %g0, %y
; CHECK: sdiv %o0, %o1, %o0
define i32 @signed_divide(i32 %a, i32 %b) {
%r = sdiv i32 %a, %b
ret i32 %r
}
; CHECK-LABEL: unsigned_divide:
; CHECK: wr %g0, %g0, %y
; CHECK: udiv %o0, %o1, %o0
define i32 @unsigned_divide(i32 %a, i32 %b) {
%r = udiv i32 %a, %b
ret i32 %r
}
; CHECK-LABEL: multiply_32x32:
; CHECK: smul %o0, %o1, %o0
define i32 @multiply_32x32(i32 %a, i32 %b) {
%r = mul i32 %a, %b
ret i32 %r
}
; CHECK-LABEL: signed_multiply_32x32_64:
; CHECK: smul %o0, %o1, %o1
; CHECK: rd %y, %o0
define i64 @signed_multiply_32x32_64(i32 %a, i32 %b) {
%xa = sext i32 %a to i64
%xb = sext i32 %b to i64
%r = mul i64 %xa, %xb
ret i64 %r
}
; CHECK-LABEL: unsigned_multiply_32x32_64:
; CHECK: umul %o0, %o1, %o2
; CHECK: rd %y, %o2
;FIXME: the smul in the output is totally redundant and should not there.
; CHECK: smul %o0, %o1, %o1
; CHECK: retl
; CHECK: mov %o2, %o0
define i64 @unsigned_multiply_32x32_64(i32 %a, i32 %b) {
%xa = zext i32 %a to i64
%xb = zext i32 %b to i64
%r = mul i64 %xa, %xb
ret i64 %r
}