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Add support for the Sparc implementation-defined "ASR" registers.

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(Note that register "Y" is essentially just ASR0).

Also added some test cases for divide and multiply, which had none before.

Differential Revision: http://reviews.llvm.org/D8670

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237580 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
James Y Knight
2015-05-18 16:29:48 +00:00
parent d811b4bacb
commit f272788a95
8 changed files with 172 additions and 20 deletions
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15
test/MC/Disassembler/Sparc/sparc.txt
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@@ -200,3 +200,18 @@
# CHECK: rett %i7+8
0x81 0xcf 0xe0 0x08
# CHECK: rd %y, %i0
0xb1 0x40 0x00 0x00
# CHECK: rd %asr1, %i0
0xb1 0x40 0x40 0x00
# CHECK: wr %i0, 5, %y
0x81 0x86 0x20 0x05
# CHECK: wr %i0, %i1, %asr15
0x9f 0x86 0x00 0x19
# CHECK: stbar
0x81 0x43 0xc0 0x00