mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-12 13:30:51 +00:00
[mips] Rename functions and variables to start with proper case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177092 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
1d905668dd
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@ -37,26 +37,26 @@ using namespace llvm;
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/// Select multiply instructions.
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std::pair<SDNode*, SDNode*>
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Mips16DAGToDAGISel::SelectMULT(SDNode *N, unsigned Opc, DebugLoc dl, EVT Ty,
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Mips16DAGToDAGISel::selectMULT(SDNode *N, unsigned Opc, DebugLoc DL, EVT Ty,
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bool HasLo, bool HasHi) {
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SDNode *Lo = 0, *Hi = 0;
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SDNode *Mul = CurDAG->getMachineNode(Opc, dl, MVT::Glue, N->getOperand(0),
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SDNode *Mul = CurDAG->getMachineNode(Opc, DL, MVT::Glue, N->getOperand(0),
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N->getOperand(1));
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SDValue InFlag = SDValue(Mul, 0);
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if (HasLo) {
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unsigned Opcode = Mips::Mflo16;
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Lo = CurDAG->getMachineNode(Opcode, dl, Ty, MVT::Glue, InFlag);
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Lo = CurDAG->getMachineNode(Opcode, DL, Ty, MVT::Glue, InFlag);
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InFlag = SDValue(Lo, 1);
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}
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if (HasHi) {
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unsigned Opcode = Mips::Mfhi16;
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Hi = CurDAG->getMachineNode(Opcode, dl, Ty, InFlag);
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Hi = CurDAG->getMachineNode(Opcode, DL, Ty, InFlag);
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}
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return std::make_pair(Lo, Hi);
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}
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void Mips16DAGToDAGISel::InitGlobalBaseReg(MachineFunction &MF) {
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void Mips16DAGToDAGISel::initGlobalBaseReg(MachineFunction &MF) {
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MipsFunctionInfo *MipsFI = MF.getInfo<MipsFunctionInfo>();
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if (!MipsFI->globalBaseRegSet())
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@ -87,7 +87,7 @@ void Mips16DAGToDAGISel::InitGlobalBaseReg(MachineFunction &MF) {
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// Insert instructions to initialize the Mips16 SP Alias register in the
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// first MBB of the function.
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//
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void Mips16DAGToDAGISel::InitMips16SPAliasReg(MachineFunction &MF) {
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void Mips16DAGToDAGISel::initMips16SPAliasReg(MachineFunction &MF) {
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MipsFunctionInfo *MipsFI = MF.getInfo<MipsFunctionInfo>();
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if (!MipsFI->mips16SPAliasRegSet())
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@ -103,9 +103,9 @@ void Mips16DAGToDAGISel::InitMips16SPAliasReg(MachineFunction &MF) {
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.addReg(Mips::SP);
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}
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void Mips16DAGToDAGISel::ProcessFunctionAfterISel(MachineFunction &MF) {
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InitGlobalBaseReg(MF);
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InitMips16SPAliasReg(MF);
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void Mips16DAGToDAGISel::processFunctionAfterISel(MachineFunction &MF) {
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initGlobalBaseReg(MF);
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initMips16SPAliasReg(MF);
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}
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/// getMips16SPAliasReg - Output the instructions required to put the
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@ -149,7 +149,7 @@ void Mips16DAGToDAGISel::getMips16SPRefReg(SDNode *Parent, SDValue &AliasReg) {
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}
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bool Mips16DAGToDAGISel::SelectAddr16(
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bool Mips16DAGToDAGISel::selectAddr16(
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SDNode *Parent, SDValue Addr, SDValue &Base, SDValue &Offset,
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SDValue &Alias) {
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EVT ValTy = Addr.getValueType();
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@ -228,9 +228,9 @@ bool Mips16DAGToDAGISel::SelectAddr16(
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/// Select instructions not customized! Used for
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/// expanded, promoted and normal instructions
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std::pair<bool, SDNode*> Mips16DAGToDAGISel::SelectNode(SDNode *Node) {
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std::pair<bool, SDNode*> Mips16DAGToDAGISel::selectNode(SDNode *Node) {
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unsigned Opcode = Node->getOpcode();
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DebugLoc dl = Node->getDebugLoc();
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DebugLoc DL = Node->getDebugLoc();
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///
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// Instruction Selection not handled by the auto-generated
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@ -267,9 +267,9 @@ std::pair<bool, SDNode*> Mips16DAGToDAGISel::SelectNode(SDNode *Node) {
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EVT VT = LHS.getValueType();
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unsigned Sltu_op = Mips::SltuRxRyRz16;
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SDNode *Carry = CurDAG->getMachineNode(Sltu_op, dl, VT, Ops, 2);
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SDNode *Carry = CurDAG->getMachineNode(Sltu_op, DL, VT, Ops, 2);
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unsigned Addu_op = Mips::AdduRxRyRz16;
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SDNode *AddCarry = CurDAG->getMachineNode(Addu_op, dl, VT,
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SDNode *AddCarry = CurDAG->getMachineNode(Addu_op, DL, VT,
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SDValue(Carry,0), RHS);
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SDNode *Result = CurDAG->SelectNodeTo(Node, MOp, VT, MVT::Glue, LHS,
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@ -281,7 +281,7 @@ std::pair<bool, SDNode*> Mips16DAGToDAGISel::SelectNode(SDNode *Node) {
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case ISD::SMUL_LOHI:
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case ISD::UMUL_LOHI: {
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MultOpc = (Opcode == ISD::UMUL_LOHI ? Mips::MultuRxRy16 : Mips::MultRxRy16);
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std::pair<SDNode*, SDNode*> LoHi = SelectMULT(Node, MultOpc, dl, NodeTy,
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std::pair<SDNode*, SDNode*> LoHi = selectMULT(Node, MultOpc, DL, NodeTy,
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true, true);
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if (!SDValue(Node, 0).use_empty())
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ReplaceUses(SDValue(Node, 0), SDValue(LoHi.first, 0));
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@ -295,7 +295,7 @@ std::pair<bool, SDNode*> Mips16DAGToDAGISel::SelectNode(SDNode *Node) {
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case ISD::MULHS:
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case ISD::MULHU: {
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MultOpc = (Opcode == ISD::MULHU ? Mips::MultuRxRy16 : Mips::MultRxRy16);
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SDNode *Result = SelectMULT(Node, MultOpc, dl, NodeTy, false, true).second;
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SDNode *Result = selectMULT(Node, MultOpc, DL, NodeTy, false, true).second;
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return std::make_pair(true, Result);
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}
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}
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@ -23,25 +23,25 @@ public:
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explicit Mips16DAGToDAGISel(MipsTargetMachine &TM) : MipsDAGToDAGISel(TM) {}
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private:
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std::pair<SDNode*, SDNode*> SelectMULT(SDNode *N, unsigned Opc, DebugLoc dl,
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std::pair<SDNode*, SDNode*> selectMULT(SDNode *N, unsigned Opc, DebugLoc DL,
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EVT Ty, bool HasLo, bool HasHi);
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SDValue getMips16SPAliasReg();
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void getMips16SPRefReg(SDNode *Parent, SDValue &AliasReg);
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virtual bool SelectAddr16(SDNode *Parent, SDValue N, SDValue &Base,
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virtual bool selectAddr16(SDNode *Parent, SDValue N, SDValue &Base,
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SDValue &Offset, SDValue &Alias);
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virtual std::pair<bool, SDNode*> SelectNode(SDNode *Node);
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virtual std::pair<bool, SDNode*> selectNode(SDNode *Node);
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virtual void ProcessFunctionAfterISel(MachineFunction &MF);
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virtual void processFunctionAfterISel(MachineFunction &MF);
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// Insert instructions to initialize the global base register in the
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// first MBB of the function.
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void InitGlobalBaseReg(MachineFunction &MF);
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void initGlobalBaseReg(MachineFunction &MF);
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void InitMips16SPAliasReg(MachineFunction &MF);
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void initMips16SPAliasReg(MachineFunction &MF);
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};
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FunctionPass *createMips16ISelDag(MipsTargetMachine &TM);
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@ -15,7 +15,7 @@
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// Mips Address
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//
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def addr16 :
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ComplexPattern<iPTR, 3, "SelectAddr16", [frameindex], [SDNPWantParent]>;
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ComplexPattern<iPTR, 3, "selectAddr16", [frameindex], [SDNPWantParent]>;
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//
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// Address operand
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@ -49,7 +49,7 @@ using namespace llvm;
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bool MipsDAGToDAGISel::runOnMachineFunction(MachineFunction &MF) {
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bool Ret = SelectionDAGISel::runOnMachineFunction(MF);
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ProcessFunctionAfterISel(MF);
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processFunctionAfterISel(MF);
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return Ret;
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}
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@ -81,7 +81,7 @@ bool MipsDAGToDAGISel::selectIntAddr(SDValue Addr, SDValue &Base,
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return false;
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}
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bool MipsDAGToDAGISel::SelectAddr16(SDNode *Parent, SDValue N, SDValue &Base,
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bool MipsDAGToDAGISel::selectAddr16(SDNode *Parent, SDValue N, SDValue &Base,
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SDValue &Offset, SDValue &Alias) {
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llvm_unreachable("Unimplemented function.");
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return false;
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@ -91,7 +91,7 @@ bool MipsDAGToDAGISel::SelectAddr16(SDNode *Parent, SDValue N, SDValue &Base,
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/// expanded, promoted and normal instructions
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SDNode* MipsDAGToDAGISel::Select(SDNode *Node) {
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unsigned Opcode = Node->getOpcode();
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DebugLoc dl = Node->getDebugLoc();
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DebugLoc DL = Node->getDebugLoc();
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EVT NodeTy = Node->getValueType(0);
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// Dump information about the Node being selected
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@ -104,7 +104,7 @@ SDNode* MipsDAGToDAGISel::Select(SDNode *Node) {
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}
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// See if subclasses can handle this node.
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std::pair<bool, SDNode*> Ret = SelectNode(Node);
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std::pair<bool, SDNode*> Ret = selectNode(Node);
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if (Ret.first)
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return Ret.second;
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@ -65,19 +65,19 @@ private:
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virtual bool selectIntAddr(SDValue Addr, SDValue &Base,
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SDValue &Offset) const;
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virtual bool SelectAddr16(SDNode *Parent, SDValue N, SDValue &Base,
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virtual bool selectAddr16(SDNode *Parent, SDValue N, SDValue &Base,
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SDValue &Offset, SDValue &Alias);
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virtual SDNode *Select(SDNode *N);
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virtual std::pair<bool, SDNode*> SelectNode(SDNode *Node) = 0;
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virtual std::pair<bool, SDNode*> selectNode(SDNode *Node) = 0;
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// getImm - Return a target constant with the specified value.
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inline SDValue getImm(const SDNode *Node, uint64_t Imm) {
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return CurDAG->getTargetConstant(Imm, Node->getValueType(0));
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}
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virtual void ProcessFunctionAfterISel(MachineFunction &MF) = 0;
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virtual void processFunctionAfterISel(MachineFunction &MF) = 0;
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virtual bool SelectInlineAsmMemoryOperand(const SDValue &Op,
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char ConstraintCode,
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@ -36,7 +36,7 @@
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using namespace llvm;
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bool MipsSEDAGToDAGISel::ReplaceUsesWithZeroReg(MachineRegisterInfo *MRI,
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bool MipsSEDAGToDAGISel::replaceUsesWithZeroReg(MachineRegisterInfo *MRI,
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const MachineInstr& MI) {
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unsigned DstReg = 0, ZeroReg = 0;
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@ -74,7 +74,7 @@ bool MipsSEDAGToDAGISel::ReplaceUsesWithZeroReg(MachineRegisterInfo *MRI,
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return true;
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}
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void MipsSEDAGToDAGISel::InitGlobalBaseReg(MachineFunction &MF) {
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void MipsSEDAGToDAGISel::initGlobalBaseReg(MachineFunction &MF) {
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MipsFunctionInfo *MipsFI = MF.getInfo<MipsFunctionInfo>();
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if (!MipsFI->globalBaseRegSet())
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@ -166,34 +166,34 @@ void MipsSEDAGToDAGISel::InitGlobalBaseReg(MachineFunction &MF) {
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.addReg(Mips::V0).addReg(Mips::T9);
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}
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void MipsSEDAGToDAGISel::ProcessFunctionAfterISel(MachineFunction &MF) {
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InitGlobalBaseReg(MF);
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void MipsSEDAGToDAGISel::processFunctionAfterISel(MachineFunction &MF) {
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initGlobalBaseReg(MF);
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MachineRegisterInfo *MRI = &MF.getRegInfo();
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for (MachineFunction::iterator MFI = MF.begin(), MFE = MF.end(); MFI != MFE;
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++MFI)
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for (MachineBasicBlock::iterator I = MFI->begin(); I != MFI->end(); ++I)
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ReplaceUsesWithZeroReg(MRI, *I);
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replaceUsesWithZeroReg(MRI, *I);
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}
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/// Select multiply instructions.
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std::pair<SDNode*, SDNode*>
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MipsSEDAGToDAGISel::SelectMULT(SDNode *N, unsigned Opc, DebugLoc dl, EVT Ty,
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MipsSEDAGToDAGISel::selectMULT(SDNode *N, unsigned Opc, DebugLoc DL, EVT Ty,
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bool HasLo, bool HasHi) {
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SDNode *Lo = 0, *Hi = 0;
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SDNode *Mul = CurDAG->getMachineNode(Opc, dl, MVT::Glue, N->getOperand(0),
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SDNode *Mul = CurDAG->getMachineNode(Opc, DL, MVT::Glue, N->getOperand(0),
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N->getOperand(1));
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SDValue InFlag = SDValue(Mul, 0);
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if (HasLo) {
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unsigned Opcode = (Ty == MVT::i32 ? Mips::MFLO : Mips::MFLO64);
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Lo = CurDAG->getMachineNode(Opcode, dl, Ty, MVT::Glue, InFlag);
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Lo = CurDAG->getMachineNode(Opcode, DL, Ty, MVT::Glue, InFlag);
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InFlag = SDValue(Lo, 1);
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}
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if (HasHi) {
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unsigned Opcode = (Ty == MVT::i32 ? Mips::MFHI : Mips::MFHI64);
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Hi = CurDAG->getMachineNode(Opcode, dl, Ty, InFlag);
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Hi = CurDAG->getMachineNode(Opcode, DL, Ty, InFlag);
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}
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return std::make_pair(Lo, Hi);
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}
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@ -279,9 +279,9 @@ bool MipsSEDAGToDAGISel::selectIntAddr(SDValue Addr, SDValue &Base,
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selectAddrDefault(Addr, Base, Offset);
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}
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std::pair<bool, SDNode*> MipsSEDAGToDAGISel::SelectNode(SDNode *Node) {
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std::pair<bool, SDNode*> MipsSEDAGToDAGISel::selectNode(SDNode *Node) {
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unsigned Opcode = Node->getOpcode();
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DebugLoc dl = Node->getDebugLoc();
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DebugLoc DL = Node->getDebugLoc();
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///
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// Instruction Selection not handled by the auto-generated
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@ -319,9 +319,9 @@ std::pair<bool, SDNode*> MipsSEDAGToDAGISel::SelectNode(SDNode *Node) {
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EVT VT = LHS.getValueType();
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unsigned Sltu_op = Mips::SLTu;
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SDNode *Carry = CurDAG->getMachineNode(Sltu_op, dl, VT, Ops, 2);
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SDNode *Carry = CurDAG->getMachineNode(Sltu_op, DL, VT, Ops, 2);
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unsigned Addu_op = Mips::ADDu;
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SDNode *AddCarry = CurDAG->getMachineNode(Addu_op, dl, VT,
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SDNode *AddCarry = CurDAG->getMachineNode(Addu_op, DL, VT,
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SDValue(Carry,0), RHS);
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Result = CurDAG->SelectNodeTo(Node, MOp, VT, MVT::Glue, LHS,
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@ -337,7 +337,7 @@ std::pair<bool, SDNode*> MipsSEDAGToDAGISel::SelectNode(SDNode *Node) {
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else
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MultOpc = (Opcode == ISD::UMUL_LOHI ? Mips::DMULTu : Mips::DMULT);
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std::pair<SDNode*, SDNode*> LoHi = SelectMULT(Node, MultOpc, dl, NodeTy,
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std::pair<SDNode*, SDNode*> LoHi = selectMULT(Node, MultOpc, DL, NodeTy,
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true, true);
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if (!SDValue(Node, 0).use_empty())
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@ -355,7 +355,7 @@ std::pair<bool, SDNode*> MipsSEDAGToDAGISel::SelectNode(SDNode *Node) {
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if (Subtarget.hasMips32() && NodeTy == MVT::i32)
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break;
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MultOpc = NodeTy == MVT::i32 ? Mips::MULT : Mips::DMULT;
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Result = SelectMULT(Node, MultOpc, dl, NodeTy, true, false).first;
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Result = selectMULT(Node, MultOpc, DL, NodeTy, true, false).first;
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return std::make_pair(true, Result);
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}
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case ISD::MULHS:
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@ -365,7 +365,7 @@ std::pair<bool, SDNode*> MipsSEDAGToDAGISel::SelectNode(SDNode *Node) {
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else
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MultOpc = (Opcode == ISD::MULHU ? Mips::DMULTu : Mips::DMULT);
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Result = SelectMULT(Node, MultOpc, dl, NodeTy, false, true).second;
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Result = selectMULT(Node, MultOpc, DL, NodeTy, false, true).second;
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return std::make_pair(true, Result);
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}
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@ -373,13 +373,13 @@ std::pair<bool, SDNode*> MipsSEDAGToDAGISel::SelectNode(SDNode *Node) {
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ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(Node);
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if (Node->getValueType(0) == MVT::f64 && CN->isExactlyValue(+0.0)) {
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if (Subtarget.hasMips64()) {
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SDValue Zero = CurDAG->getCopyFromReg(CurDAG->getEntryNode(), dl,
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SDValue Zero = CurDAG->getCopyFromReg(CurDAG->getEntryNode(), DL,
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Mips::ZERO_64, MVT::i64);
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Result = CurDAG->getMachineNode(Mips::DMTC1, dl, MVT::f64, Zero);
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Result = CurDAG->getMachineNode(Mips::DMTC1, DL, MVT::f64, Zero);
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} else {
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SDValue Zero = CurDAG->getCopyFromReg(CurDAG->getEntryNode(), dl,
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SDValue Zero = CurDAG->getCopyFromReg(CurDAG->getEntryNode(), DL,
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Mips::ZERO, MVT::i32);
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Result = CurDAG->getMachineNode(Mips::BuildPairF64, dl, MVT::f64, Zero,
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Result = CurDAG->getMachineNode(Mips::BuildPairF64, DL, MVT::f64, Zero,
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Zero);
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}
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@ -447,9 +447,9 @@ std::pair<bool, SDNode*> MipsSEDAGToDAGISel::SelectNode(SDNode *Node) {
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CurDAG->getMachineNode(RdhwrOpc, Node->getDebugLoc(),
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Node->getValueType(0),
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CurDAG->getRegister(SrcReg, PtrVT));
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SDValue Chain = CurDAG->getCopyToReg(CurDAG->getEntryNode(), dl, DestReg,
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SDValue Chain = CurDAG->getCopyToReg(CurDAG->getEntryNode(), DL, DestReg,
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SDValue(Rdhwr, 0));
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SDValue ResNode = CurDAG->getCopyFromReg(Chain, dl, DestReg, PtrVT);
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SDValue ResNode = CurDAG->getCopyFromReg(Chain, DL, DestReg, PtrVT);
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ReplaceUses(SDValue(Node, 0), ResNode);
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return std::make_pair(true, ResNode.getNode());
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}
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@ -24,9 +24,9 @@ public:
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explicit MipsSEDAGToDAGISel(MipsTargetMachine &TM) : MipsDAGToDAGISel(TM) {}
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private:
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bool ReplaceUsesWithZeroReg(MachineRegisterInfo *MRI, const MachineInstr&);
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bool replaceUsesWithZeroReg(MachineRegisterInfo *MRI, const MachineInstr&);
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std::pair<SDNode*, SDNode*> SelectMULT(SDNode *N, unsigned Opc, DebugLoc dl,
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std::pair<SDNode*, SDNode*> selectMULT(SDNode *N, unsigned Opc, DebugLoc dl,
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EVT Ty, bool HasLo, bool HasHi);
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virtual bool selectAddrRegImm(SDValue Addr, SDValue &Base,
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@ -38,13 +38,13 @@ private:
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virtual bool selectIntAddr(SDValue Addr, SDValue &Base,
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SDValue &Offset) const;
|
||||
|
||||
virtual std::pair<bool, SDNode*> SelectNode(SDNode *Node);
|
||||
virtual std::pair<bool, SDNode*> selectNode(SDNode *Node);
|
||||
|
||||
virtual void ProcessFunctionAfterISel(MachineFunction &MF);
|
||||
virtual void processFunctionAfterISel(MachineFunction &MF);
|
||||
|
||||
// Insert instructions to initialize the global base register in the
|
||||
// first MBB of the function.
|
||||
void InitGlobalBaseReg(MachineFunction &MF);
|
||||
void initGlobalBaseReg(MachineFunction &MF);
|
||||
};
|
||||
|
||||
FunctionPass *createMipsSEISelDag(MipsTargetMachine &TM);
|
||||
|
Loading…
Reference in New Issue
Block a user