From f2c4db97e18747142b3fb3f21e711c93cf6ac004 Mon Sep 17 00:00:00 2001 From: Jyotsna Verma Date: Tue, 5 Feb 2013 18:23:51 +0000 Subject: [PATCH] Hexagon: Add testcase for post-increment store instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174419 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/Hexagon/postinc-store.ll | 29 +++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) create mode 100644 test/CodeGen/Hexagon/postinc-store.ll diff --git a/test/CodeGen/Hexagon/postinc-store.ll b/test/CodeGen/Hexagon/postinc-store.ll new file mode 100644 index 00000000000..99a3a58ad39 --- /dev/null +++ b/test/CodeGen/Hexagon/postinc-store.ll @@ -0,0 +1,29 @@ +; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s + +; Check that post-increment store instructions are being generated. +; CHECK: memw(r{{[0-9]+}}{{ *}}++{{ *}}#4{{ *}}){{ *}}={{ *}}r{{[0-9]+}} + +define i32 @sum(i32* nocapture %a, i16* nocapture %b, i32 %n) nounwind { +entry: + br label %for.body + +for.body: ; preds = %for.body, %entry + %lsr.iv = phi i32 [ %lsr.iv.next, %for.body ], [ 10, %entry ] + %arrayidx.phi = phi i32* [ %a, %entry ], [ %arrayidx.inc, %for.body ] + %arrayidx1.phi = phi i16* [ %b, %entry ], [ %arrayidx1.inc, %for.body ] + %0 = load i32* %arrayidx.phi, align 4 + %1 = load i16* %arrayidx1.phi, align 2 + %conv = sext i16 %1 to i32 + %factor = mul i32 %0, 2 + %add3 = add i32 %factor, %conv + store i32 %add3, i32* %arrayidx.phi, align 4 + + %arrayidx.inc = getelementptr i32* %arrayidx.phi, i32 1 + %arrayidx1.inc = getelementptr i16* %arrayidx1.phi, i32 1 + %lsr.iv.next = add i32 %lsr.iv, -1 + %exitcond = icmp eq i32 %lsr.iv.next, 0 + br i1 %exitcond, label %for.end, label %for.body + +for.end: ; preds = %for.body + ret i32 0 +}