From f2cdc0b1e9fb92fa1837fd8e7498df5423bcd642 Mon Sep 17 00:00:00 2001 From: Reid Kleckner Date: Thu, 4 Sep 2014 16:58:25 +0000 Subject: [PATCH] X86: cpuid and xgetbv write to 32-bit registers, not 64-bit This fixes an issue where MS inline assembly containing xgetbv wouldn't be marked as clobbering EAX:EDX. Test for that forthcoming on the Clang side. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217173 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86InstrSystem.td | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) diff --git a/lib/Target/X86/X86InstrSystem.td b/lib/Target/X86/X86InstrSystem.td index 92f8bae0479..8cabdd0424d 100644 --- a/lib/Target/X86/X86InstrSystem.td +++ b/lib/Target/X86/X86InstrSystem.td @@ -462,11 +462,7 @@ def LMSW16m : I<0x01, MRM6m, (outs), (ins i16mem:$src), "lmsw{w}\t$src", [], IIC_LMSW_REG>, TB; let Defs = [EAX, EBX, ECX, EDX], Uses = [EAX, ECX] in - def CPUID32 : I<0xA2, RawFrm, (outs), (ins), "cpuid", [], IIC_CPUID>, TB, - Requires<[Not64BitMode]>; -let Defs = [RAX, RBX, RCX, RDX], Uses = [RAX, RCX] in - def CPUID64 : I<0xA2, RawFrm, (outs), (ins), "cpuid", [], IIC_CPUID>, TB, - Requires<[In64BitMode]>; + def CPUID : I<0xA2, RawFrm, (outs), (ins), "cpuid", [], IIC_CPUID>, TB; } // SchedRW //===----------------------------------------------------------------------===// @@ -479,10 +475,10 @@ def WBINVD : I<0x09, RawFrm, (outs), (ins), "wbinvd", [], IIC_INVD>, TB; //===----------------------------------------------------------------------===// // XSAVE instructions let SchedRW = [WriteSystem] in { -let Defs = [RDX, RAX], Uses = [RCX] in +let Defs = [EDX, EAX], Uses = [ECX] in def XGETBV : I<0x01, MRM_D0, (outs), (ins), "xgetbv", []>, TB; -let Uses = [RDX, RAX, RCX] in +let Uses = [EDX, EAX, ECX] in def XSETBV : I<0x01, MRM_D1, (outs), (ins), "xsetbv", []>, TB; let Uses = [RDX, RAX] in {