diff --git a/include/llvm/CodeGen/LiveInterval.h b/include/llvm/CodeGen/LiveInterval.h
index a50fef96b3e..3fb0c1dc4e8 100644
--- a/include/llvm/CodeGen/LiveInterval.h
+++ b/include/llvm/CodeGen/LiveInterval.h
@@ -275,14 +275,16 @@ namespace llvm {
 
     /// beginNumber - Return the lowest numbered slot covered by interval.
     unsigned beginNumber() const {
-      assert(!empty() && "empty interval for register");
+      if (empty())
+        return 0;
       return ranges.front().start;
     }
 
     /// endNumber - return the maximum point of the interval of the whole,
     /// exclusive.
     unsigned endNumber() const {
-      assert(!empty() && "empty interval for register");
+      if (empty())
+        return 0;
       return ranges.back().end;
     }
 
diff --git a/lib/CodeGen/RegAllocLinearScan.cpp b/lib/CodeGen/RegAllocLinearScan.cpp
index 6925de3abf1..19c7da1d525 100644
--- a/lib/CodeGen/RegAllocLinearScan.cpp
+++ b/lib/CodeGen/RegAllocLinearScan.cpp
@@ -322,11 +322,13 @@ void RALinScan::linearScan()
     ++NumIters;
     DOUT << "\n*** CURRENT ***: " << *cur << '\n';
 
-    processActiveIntervals(cur->beginNumber());
-    processInactiveIntervals(cur->beginNumber());
+    if (!cur->empty()) {
+      processActiveIntervals(cur->beginNumber());
+      processInactiveIntervals(cur->beginNumber());
 
-    assert(TargetRegisterInfo::isVirtualRegister(cur->reg) &&
-           "Can only allocate virtual registers!");
+      assert(TargetRegisterInfo::isVirtualRegister(cur->reg) &&
+             "Can only allocate virtual registers!");
+    }
 
     // Allocating a virtual register. try to find a free
     // physical register or spill an interval (possibly this one) in order to
@@ -508,11 +510,23 @@ void RALinScan::assignRegOrStackSlotAtInterval(LiveInterval* cur)
 {
   DOUT << "\tallocating current interval: ";
 
+  // This is an implicitly defined live interval, just assign any register.
+  const TargetRegisterClass *RC = reginfo_->getRegClass(cur->reg);
+  if (cur->empty()) {
+    unsigned physReg = cur->preference;
+    if (!physReg)
+      physReg = *RC->allocation_order_begin(*mf_);
+    DOUT <<  tri_->getName(physReg) << '\n';
+    // Note the register is not really in use.
+    vrm_->assignVirt2Phys(cur->reg, physReg);
+    handled_.push_back(cur);
+    return;
+  }
+
   PhysRegTracker backupPrt = *prt_;
 
   std::vector<std::pair<unsigned, float> > SpillWeightsToAdd;
   unsigned StartPosition = cur->beginNumber();
-  const TargetRegisterClass *RC = reginfo_->getRegClass(cur->reg);
   const TargetRegisterClass *RCLeader = RelatedRegClasses.getLeaderValue(RC);
 
   // If this live interval is defined by a move instruction and its source is