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Patch r153892 for PR11861 apparently broke an external project (see PR12493).
This patch restores TwoAddressInstructionPass's pre-r153892 behaviour when rescheduling instructions in TryInstructionTransform. Hopefully this will fix PR12493. To refix PR11861, lowering of INSERT_SUBREGS is deferred until after the copy that unties the operands is emitted (this seems to be a more appropriate fix for that issue anyway). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154338 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1183,8 +1183,9 @@ TwoAddressInstructionPass::RescheduleKillAboveMI(MachineBasicBlock *MBB,
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/// TryInstructionTransform - For the case where an instruction has a single
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/// pair of tied register operands, attempt some transformations that may
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/// either eliminate the tied operands or improve the opportunities for
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/// coalescing away the register copy. Returns true if the tied operands
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/// are eliminated altogether.
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/// coalescing away the register copy. Returns true if no copy needs to be
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/// inserted to untie mi's operands (either because they were untied, or
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/// because mi was rescheduled, and will be visited again later).
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bool TwoAddressInstructionPass::
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TryInstructionTransform(MachineBasicBlock::iterator &mi,
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MachineBasicBlock::iterator &nmi,
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@ -1248,7 +1249,7 @@ TryInstructionTransform(MachineBasicBlock::iterator &mi,
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// re-schedule this MI below it.
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if (RescheduleMIBelowKill(mbbi, mi, nmi, regB)) {
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++NumReSchedDowns;
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return false;
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return true;
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}
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if (TargetRegisterInfo::isVirtualRegister(regA))
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@ -1270,7 +1271,7 @@ TryInstructionTransform(MachineBasicBlock::iterator &mi,
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// re-schedule it before this MI if it's legal.
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if (RescheduleKillAboveMI(mbbi, mi, nmi, regB)) {
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++NumReSchedUps;
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return false;
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return true;
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}
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// If this is an instruction with a load folded into it, try unfolding
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@ -1594,19 +1595,19 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
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MadeChange = true;
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DEBUG(dbgs() << "\t\trewrite to:\t" << *mi);
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}
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// Rewrite INSERT_SUBREG as COPY now that we no longer need SSA form.
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if (mi->isInsertSubreg()) {
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// From %reg = INSERT_SUBREG %reg, %subreg, subidx
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// To %reg:subidx = COPY %subreg
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unsigned SubIdx = mi->getOperand(3).getImm();
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mi->RemoveOperand(3);
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assert(mi->getOperand(0).getSubReg() == 0 && "Unexpected subreg idx");
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mi->getOperand(0).setSubReg(SubIdx);
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mi->RemoveOperand(1);
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mi->setDesc(TII->get(TargetOpcode::COPY));
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DEBUG(dbgs() << "\t\tconvert to:\t" << *mi);
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// Rewrite INSERT_SUBREG as COPY now that we no longer need SSA form.
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if (mi->isInsertSubreg()) {
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// From %reg = INSERT_SUBREG %reg, %subreg, subidx
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// To %reg:subidx = COPY %subreg
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unsigned SubIdx = mi->getOperand(3).getImm();
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mi->RemoveOperand(3);
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assert(mi->getOperand(0).getSubReg() == 0 && "Unexpected subreg idx");
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mi->getOperand(0).setSubReg(SubIdx);
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mi->RemoveOperand(1);
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mi->setDesc(TII->get(TargetOpcode::COPY));
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DEBUG(dbgs() << "\t\tconvert to:\t" << *mi);
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}
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}
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// Clear TiedOperands here instead of at the top of the loop
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