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Move the point at which FastISel taps into the SelectionDAGISel

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process up to a higher level. This allows FastISel to leverage
more of SelectionDAGISel's infastructure, such as updating Machine
PHI nodes.

Also, implement transitioning from SDISel back to FastISel in
the middle of a block, so it's now possible to go back and
forth. This allows FastISel to hand individual CallInsts and other
complicated things off to SDISel to handle, while handling the rest
of the block itself.

To help support this, reorganize the SelectionDAG class so that it
is allocated once and reused throughout a function, instead of
being completely reallocated for each block.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55219 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman
2008-08-23 02:25:05 +00:00
parent 6679906d97
commit f350b277f3
14 changed files with 366 additions and 332 deletions
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2
utils/TableGen/DAGISelEmitter.cpp
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@@ -1864,7 +1864,7 @@ void DAGISelEmitter::EmitInstructionSelector(std::ostream &OS) {
// Emit boilerplate.
OS << "SDNode *Select_INLINEASM(SDValue N) {\n"
<< " std::vector<SDValue> Ops(N.Val->op_begin(), N.Val->op_end());\n"
<< " SelectInlineAsmMemoryOperands(Ops, *CurDAG);\n\n"
<< " SelectInlineAsmMemoryOperands(Ops);\n\n"
<< " // Ensure that the asm operands are themselves selected.\n"
<< " for (unsigned j = 0, e = Ops.size(); j != e; ++j)\n"