diff --git a/lib/CodeGen/IfConversion.cpp b/lib/CodeGen/IfConversion.cpp
index 739c06b11a3..02249c9fce1 100644
--- a/lib/CodeGen/IfConversion.cpp
+++ b/lib/CodeGen/IfConversion.cpp
@@ -1132,10 +1132,10 @@ void IfConverter::PredicateBlock(BBInfo &BBI,
     if (TII->isPredicated(I))
       continue;
     if (!TII->PredicateInstruction(I, Cond)) {
-      std::string msg;
-      raw_string_ostream Msg(msg);
-      Msg << "Unable to predicate " << *I << "!";
-      llvm_report_error(Msg.str());
+#ifndef NDEBUG
+      cerr << "Unable to predicate " << *I << "!\n";
+#endif
+      llvm_unreachable();
     }
   }
 
@@ -1168,10 +1168,10 @@ void IfConverter::CopyAndPredicateBlock(BBInfo &ToBBI, BBInfo &FromBBI,
 
     if (!isPredicated)
       if (!TII->PredicateInstruction(MI, Cond)) {
-        std::string msg;
-        raw_string_ostream Msg(msg);
-        Msg << "Unable to predicate " << *MI << "!";
-        llvm_report_error(Msg.str());
+#ifndef NDEBUG
+        cerr << "Unable to predicate " << *I << "!\n";
+#endif
+        llvm_unreachable();
       }
   }
 
diff --git a/lib/CodeGen/PreAllocSplitting.cpp b/lib/CodeGen/PreAllocSplitting.cpp
index 52a403bd363..c49575bade6 100644
--- a/lib/CodeGen/PreAllocSplitting.cpp
+++ b/lib/CodeGen/PreAllocSplitting.cpp
@@ -1035,10 +1035,7 @@ bool PreAllocSplitting::SplitRegLiveInterval(LiveInterval *LI) {
     CurrLI->FindLiveRangeContaining(LIs->getUseIndex(BarrierIdx));
   VNInfo *ValNo = LR->valno;
 
-  if (ValNo->isUnused()) {
-    // Defined by a dead def? How can this be?
-    LLVM_UNREACHABLE("Val# is defined by a dead def?");
-  }
+  assert(!ValNo->isUnused() && "Val# is defined by a dead def?");
 
   MachineInstr *DefMI = ValNo->isDefAccurate()
     ? LIs->getInstructionFromIndex(ValNo->def) : NULL;
diff --git a/lib/CodeGen/RegisterScavenging.cpp b/lib/CodeGen/RegisterScavenging.cpp
index ab9a0e340d2..84cff8d5d88 100644
--- a/lib/CodeGen/RegisterScavenging.cpp
+++ b/lib/CodeGen/RegisterScavenging.cpp
@@ -459,9 +459,8 @@ unsigned RegScavenger::scavengeRegister(const TargetRegisterClass *RC,
     Reg = Candidates.find_next(Reg);
   }
 
-  if (ScavengedReg != 0) {
-    LLVM_UNREACHABLE("Scavenger slot is live, unable to scavenge another register!");
-  }
+  assert(ScavengedReg == 0 && 
+         "Scavenger slot is live, unable to scavenge another register!");
 
   // Spill the scavenged register before I.
   TII->storeRegToStackSlot(*MBB, I, SReg, true, ScavengingFrameIndex, RC);
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index b084ab79a79..6d7c9c07de9 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -152,9 +152,12 @@ namespace llvm {
 // basic blocks, and the scheduler passes ownership of it to this method.
 MachineBasicBlock *TargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI,
                                                  MachineBasicBlock *MBB) const {
-  llvm_report_error("If a target marks an instruction with "
-                    "'usesCustomDAGSchedInserter', it must implement "
-                    "TargetLowering::EmitInstrWithCustomInserter!");
+#ifndef NDEBUG
+  cerr << "If a target marks an instruction with "
+          "'usesCustomDAGSchedInserter', it must implement "
+          "TargetLowering::EmitInstrWithCustomInserter!";
+#endif
+  llvm_unreachable();
   return 0;  
 }
 
@@ -831,8 +834,8 @@ void SelectionDAGISel::SelectAllBasicBlocks(Function &Fn,
               cerr << "FastISel miss: ";
               BI->dump();
             }
-            if (EnableFastISelAbort)
-              LLVM_UNREACHABLE("FastISel didn't handle a PHI in a successor");
+            assert(!EnableFastISelAbort && 
+                   "FastISel didn't handle a PHI in a successor");
             break;
           }